Edge Timing Signal Communication for Microprocessor Reliability

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Solution Overview

Problem

In safety-relevant microprocessor applications, existing communication protocols face challenges in providing fast and reliable communication between devices without requiring extensive resources, such as numerous pins or extra components, especially in scenarios where timely malfunction detection and fail-safe operations are critical.

Innovation Solution

The implementation of a self-synchronizing data communication scheme using edge timing, where a master device sends timing edges and modulates data edges based on data bits, allowing devices to communicate efficiently and reliably through a simple, high-speed interface that supports data exchange up to and above 100 MBits/s, utilizing low-voltage differential swing (LVDS) interfaces and baud rate detection circuitry for robustness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional communication protocols are used in safety-relevant applications, then reliable communication can be achieved, but the system requires extensive resources including numerous pins and extra components

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidnumber of pins and components
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple communication functions (synchronization, data transmission, and clocking) into a single communication path. The synchronized communication protocol integrates timing information and data into one signal stream, eliminating the need for separate clock lines and reducing pin count while maintaining communication reliability through embedded synchronization mechanisms

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The communication interface is designed to perform multiple functions through a single channel: it provides both data transmission and timing synchronization, and can operate in different modes (synchronized and asynchronous). This multi-functional design reduces the need for dedicated components for each function, thereby reducing overall device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple communication paths are used to ensure each safety-relevant device is functioning properly, then malfunction detection capability is improved, but the number of required communication channels increases

Engineering Contradiction:
Improvemalfunction detection capabilityVSAvoidnumber of communication paths
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines health monitoring and data communication into a single integrated path. The synchronized communication protocol embeds timing information that allows the receiving device to detect malfunctions (such as signal loss or timing errors) while simultaneously transmitting data, thereby maintaining safety monitoring capabilities without requiring separate dedicated monitoring channels

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If a simple communication interface is used to reduce resource requirements, then device complexity is reduced, but communication speed and reliability may be compromised

Engineering Contradiction:
Improvecommunication interface simplicityVSAvoidcommunication speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent employs parameter changes in the signal domain to achieve high-speed communication through a simple interface. By using differential voltage levels (LVDS) and precise timing edges as synchronization parameters, the system achieves high data rates without complex modulation schemes, maintaining interface simplicity while boosting communication speed through optimized signal characteristics

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10958412B1Communication using edge timing in a signal
Publication Date: 2021.03.23 INFINEON TECHNOLOGIES AG
  • US10958412B1 patent drawing
  • US10958412B1 patent drawing
  • US10958412B1 patent drawing

AI summary

Systems, methods, and circuitries are provided to perform bidirectional communication using edge timing. In one example, a method includes receiving, on a first signal line, a first signal having a first timing edge and a first data edge. The first timing edge is of a different type than the first data edge. The first data edge is an edge immediately adjacent to the first timing edge and occurs at a first elapsed time after the first timing edge. The method includes sampling the first signal at a predetermined sample time after the first timing edge to determine a first data value. A second data value is determined and a second signal is generated having a second timing edge and a second data edge. A second elapsed time between the second timing edge and the second data edge encodes a second data value. The second signal is transmitted on a second signal line.