Semiconductor Edge Wiring Resistance Detection for Dicing Defects
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Solution Overview
Problem
The semiconductor chip manufacturing process, particularly during dicing, often results in defects such as cracks and chipping due to blade cutting, which are difficult to detect accurately using existing methods.
Innovation Solution
A detection device and method that measures the resistance value of a laminated wiring structure along the semiconductor chip's edge to determine the presence of defects by comparing a first resistance value for a defect-free chip with a second, higher resistance value indicative of defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage clamping method is used to detect chipping, then detection capability is provided, but detection accuracy is insufficient for minute defects
Solution Approach 1:
The patent replaces the electrical voltage clamping detection method with an optical imaging system. A microscope captures images of the semiconductor chip surface, and image processing algorithms analyze these images to detect minute cracks and chipping. This substitution of electrical detection with optical detection enables visualization and precise measurement of defects that were previously undetectable by voltage methods.
Solution Approach 2:
The patent creates an optical copy (image) of the semiconductor chip surface using a microscope. This visual copy allows for detailed analysis of the chip surface morphology, enabling detection of minute defects through image processing without physically contacting or electrically stressing the chip.
2Measurement precision
If advanced detection methods are used to improve accuracy, then detection precision increases, but manufacturing cost increases
Solution Approach 1:
The patent integrates multiple functions into a single detection system. The imaging system not only detects chipping and cracks but can also verify wiring continuity and identify defect locations. This multi-functionality eliminates the need for separate detection equipment for each type of defect, reducing overall manufacturing cost while maintaining high detection accuracy.
Solution Approach 2:
The detection system uses the chip's own wiring structure as part of the detection process. By imaging the wiring patterns and analyzing their continuity, the system leverages the chip's inherent features rather than requiring additional test structures or components, thereby reducing manufacturing complexity and cost.
3Ease of operation
If visual inspection is used to detect defects, then detection simplicity is maintained, but detection accuracy for minute cracks is insufficient
Solution Approach 1:
The patent transitions from two-dimensional visual inspection to three-dimensional optical imaging with enhanced depth of field. The microscope system captures detailed surface topography information, allowing defects to be detected based on their physical presence rather than their electrical effects. Image processing algorithms further enhance this by analyzing subtle variations in the captured images to identify minute cracks and chipping.
Solution Approach 2:
The patent introduces an intermediary layer between simple visual inspection and the chip defects: a microscope imaging system with image processing capabilities. This intermediary captures and processes optical information to reveal defects that are invisible to the naked eye, bridging the gap between simple inspection methods and high-precision detection requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate and cost-effective detection of defects in semiconductor chips, reducing erroneous detections and improving yield by electrically determining the presence of defects without the need for expensive equipment or additional analyses.
Implementation Method 1
a detector that detects a resistance value of a wiring arranged along an outer edge of the semiconductor chip
Data Source
AI summary
A detection device includes: a detector configured to detect a resistance value of at least one wiring arranged along an outer edge of a semiconductor chip, wherein when the at least one wiring has no defect, the detector detects a first resistance value required for the at least one wiring having no defect, and when the at least one wiring has a defect, the detector detects a second resistance value larger than the first resistance value.