On-Chip EEG Seizure Classification for Low-Power Multi-Channel Monitoring

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Solution Overview

Problem

Current EEG monitoring devices face challenges in patient-to-patient variation of seizure patterns, integrating ultra-low power dynamic range instrumentation, and reducing communication overhead for continuous seizure detection and recording.

Innovation Solution

An integrated circuit chip with an Analog Front End, digital back-end Channel Controller, Feature Extraction Engine Processor, and Classification Engine, utilizing Chopper Stabilized-Capacitive Coupled Instrumentation Amplifiers and Support Vector Machine-based classification for real-time seizure detection and recording.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If EEG data is transmitted continuously to external processors for classification, then seizure detection accuracy is maintained, but power consumption and communication overhead increase significantly

Engineering Contradiction:
Improveseizure detection accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent extracts the classification function from external processors and integrates it directly into the EEG device. The Support Vector Machine (SVM) classifier is implemented on-chip, allowing the device to process and classify EEG data locally without continuous external communication, thereby reducing power consumption while maintaining detection accuracy

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges multiple functions (EEG acquisition, feature extraction, and seizure classification) into a single integrated system-on-chip. The SVM classifier is combined with the EEG processing pipeline, enabling local decision-making and eliminating the need for continuous data transmission to external processors

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If multiple EEG channels are monitored simultaneously, then comprehensive seizure detection capability is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improvemulti-channel monitoring capabilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the EEG processing pipeline into distinct modular stages: analog front-end for signal acquisition, feature extraction module for processing, and SVM classification module for decision-making. This segmentation allows multiple channels to be processed simultaneously through parallel instantiation of these modules, improving scalability while managing complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic channel configuration where the system can adaptively enable or disable specific processing channels based on detected seizure activity. During seizure events, all channels are actively monitored, while during normal periods, processing is reduced, thereby managing complexity and power consumption dynamically

Inventive Principle:
Principle #15Dynamics

3Use of energy by moving object

If feature extraction is performed on-chip to reduce data transmission, then power consumption is reduced, but processing complexity on the device increases

Engineering Contradiction:
Improvepower consumptionVSAvoidon-chip processing complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent performs preliminary feature extraction on-chip before data leaves the device. By computing relevant features (such as power spectral density) locally and transmitting only these extracted features rather than raw EEG data, the system reduces communication overhead and power consumption while the integrated SVM classifier handles the increased processing complexity on-chip

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11266340B2Multi-channel scalable EEG acquisition system on a chip with integrated patient specific seizure classification and recording processor
Publication Date: 2022.03.08 KHALIFA UNIV OF SCI & TECH
  • US11266340B2 patent drawing
  • US11266340B2 patent drawing
  • US11266340B2 patent drawing

AI summary

An integrated circuit chip and method for EEG monitoring. In one embodiment, the integrated circuit chip includes an Analog Front End cell in communication with an electrode and a Classification Processor wherein a signal received from the electrode is processed by the Classification Engine cell and designated as seizure or non-seizure. In another embodiment, the Analog Front End cell includes an amplifier cell in communication with an electrode; and an ASPU cell in communication with the amplifier cell. In yet another embodiment, the Classification Processor includes a DBE Channel Controller cell; a Feature Extraction Engine Processor cell, and a Classification Engine cell in communication with the Feature Extraction Engine Processor cells and the DBE Channel Controller cell.