EEPROM Backup Method Alternating Erase and Program Cycles

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Solution Overview

Problem

Conventional EEPROM backup methods are time-consuming and costly due to the need for multiple erase and program cycles to ensure data integrity, leading to potential data loss during interrupted operations.

Innovation Solution

A method and device where two data areas in an EEPROM are configured as backup storage areas, ensuring that at least one area remains in a valid state throughout each erase and program cycle, allowing for efficient data storage and backup by alternating between program and erase operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional backup methods use separate erase and program cycles for target and backup areas, then data integrity is maintained, but operation time and cost increase significantly

Engineering Contradiction:
Improvedata integrityVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the erase and program operations into a single integrated cycle that simultaneously updates both target and backup data areas. The controller performs a program operation on the target area and an erase operation on the backup area in the same cycle, eliminating the need for separate backup cycles and reducing total operation time while maintaining data integrity through coordinated state transitions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements preliminary state verification before operations begin. The controller determines the current states of both target and backup areas, and strategically selects which area to program and which to erase based on their current states. This preliminary assessment ensures that valid data is always maintained in one area while the other is updated, preventing data loss without requiring multiple retry cycles.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple erase and program cycles are performed to ensure data backup, then data integrity is improved, but manufacturing cost increases

Engineering Contradiction:
Improvedata integrityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple backup operations into a single integrated cycle. By performing the program operation on the target area and erase operation on the backup area simultaneously within one cycle, the system eliminates redundant operations that would otherwise be required to achieve the same data integrity level, thereby reducing manufacturing cost while maintaining reliability.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If data areas are updated sequentially in separate cycles, then data integrity is maintained, but productivity decreases

Engineering Contradiction:
Improvedata integrityVSAvoidoperation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges sequential update operations into a single parallel execution cycle. The controller coordinates program and erase operations to occur in the same cycle, effectively doubling the update throughput compared to sequential execution while maintaining data integrity through state-based operation selection and validation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent ensures continuous useful action by eliminating idle time between operations. While one data area is being programmed, the other is being erased in the same continuous cycle, maximizing resource utilization and preventing interruptions that would reduce productivity. This continuous coordinated operation maintains data integrity while significantly improving operational efficiency.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9786373B2EEPROM backup method and device
Publication Date: 2017.10.10 SEMICON MFG INT (SHANGHAI) CORP
  • US9786373B2 patent drawing
  • US9786373B2 patent drawing
  • US9786373B2 patent drawing

AI summary

An electrically erasable programmable read-only memory (EEPROM) device includes a plurality of data areas in the EEPROM associated with a corresponding plurality of memory addresses, respectively, a data status indicator associated with each of the plurality of data areas. The data status indicator is configured to indicate that a data area is in an erase state, an uncertain state, or a valid state. The EEPROM device also includes a controller. A first data area and a second data area are configured to be a backup storage area for each other. In an erase and program cycle, at least one of the first or second memory areas is in a valid state throughout the erase and program cycle. Further, in an erase and program cycle, an erase operation is performed in one of the first or second memory areas, and a program operation is performed in the other data areas.