EEPROM Bitwise Redundancy and Inversion for Charge Leakage

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Solution Overview

Problem

Existing memory technologies face challenges in accurately storing and retrieving data due to charge leakage and one-sided error conditions, which can lead to bit flips and errors in data storage.

Innovation Solution

The proposed solution employs bitwise word redundancy and selective bit-wise code inversion to identify and correct errors in memory storage. This involves determining the bit density of incoming data, performing an invert function if the bit density meets a threshold, duplicating the data into two parallel words, and writing these words to separate locations in the memory circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correcting codes (ECCs) are used to detect and correct bit flips, then reliability is improved, but device complexity increases due to additional redundant bits and syndrome calculation circuitry

Engineering Contradiction:
Improveerror detection and correction capabilityVSAvoidcomplexity of error correction circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent inverts the traditional ECC approach by storing data in an inverted form when the population count exceeds a threshold. Instead of adding redundant syndrome bits to detect errors, the system uses inversion to proactively transform data into a more error-resistant form, reducing the need for complex syndrome calculation circuitry while maintaining reliability

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The system dynamically changes the storage parameter (inverted vs. non-inverted form) based on the population count of the data. By adjusting this parameter according to the data characteristics, the system optimizes error resistance without requiring fixed complex error correction circuitry for all data types

Inventive Principle:
Principle #35Parameter changes

2Reliability

If bitwise word redundancy and selective bit-wise code inversion are employed to reduce uncorrectable errors, then reliability is improved, but manufacturing precision requirements increase due to precise bit density threshold checking

Engineering Contradiction:
Improveprobability of uncorrectable errorsVSAvoidprecision of bit density threshold checking
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The system performs preliminary inversion of data words before storage when the population count exceeds the threshold. This preliminary action transforms the data into a form that is more resistant to charge leakage errors, preventing errors before they occur rather than requiring high-precision detection and correction mechanisms

Inventive Principle:
Principle #10Preliminary action

3Reliability

If data words are inverted based on population count to exploit one-sided error conditions, then reliability is improved, but ease of operation decreases due to additional inversion logic and threshold checking

Engineering Contradiction:
Improveexploitation of one-sided error conditionVSAvoidoperation complexity of inversion logic
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The system automatically determines whether to invert data words based on their population count, performing the inversion operation self-service without requiring external control logic. This automation reduces the operational burden while maintaining the reliability benefits of exploiting one-sided error conditions

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250028596A1EEPROM Correction Method
Publication Date: 2025.01.23 HONEYWELL INTERNATIONAL INC
  • US20250028596A1 patent drawing
  • US20250028596A1 patent drawing
  • US20250028596A1 patent drawing

AI summary

A computer readable storage medium and techniques to verify that information stored in the storage medium is accurate. Information in the storage medium is accurate when it is the same as the information written to the storage medium. In some examples, circuitry of the computer readable storage medium may be subject to charge leakage, and one or more bits of a word stored in the storage medium may decay, for example, from a logic zero to a logic one. The computer readable storage medium of this disclosure, e.g., referred to as a memory for short, may employ bitwise word redundancy, and selective bit wise code inversion to identify and correct errors in the stored information.