Control Gate Electrode Silicide Uniformity in EEPROM
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Solution Overview
Problem
The increasing aspect ratio of control gate electrodes in semiconductor devices leads to variations in resistance values and deterioration due to challenges in controlling the diffusion of metallic atoms during the formation of metallic silicide films, resulting in increased resistance and agglomeration issues in NAND flash memory cells.
Innovation Solution
A semiconductor device structure with stacked gate electrodes, where the control gate electrode consists of two conductive layers, with the second layer being a metallic silicide film formed on the polysilicon surface and side surfaces, allowing for controlled diffusion and uniformity, and a method involving the formation of a metallic film on exposed surfaces for silicidization, enabling consistent silicide film thickness across the control gate electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the control gate electrode is turned into a metallic silicide film by depositing a metallic film on the polysilicon surface and heating, then the resistance value is reduced, but the resistance value increases due to uncontrollable diffusion of metallic atoms in high aspect ratio structures
Solution Approach 1:
The patent segments the control gate electrode into multiple regions: a first region with a thick metallic silicide film (50-200 nm) for low resistance, and a second region with a thin metallic silicide film (5-50 nm) for controlled diffusion. This segmentation allows different diffusion characteristics in different regions, resolving the contradiction between reducing resistance and controlling diffusion precision.
Solution Approach 2:
The patent applies local quality by creating different silicide film thicknesses in different regions of the control gate electrode. The first region has a thicker silicide film with different diffusion characteristics compared to the thinner silicide film in the second region, allowing optimized performance for each specific functional requirement.
2Productivity
If the aspect ratio of the control gate electrode is increased to maintain device functionality in micronized structures, then device scaling is achieved, but uniformity of silicide film formation deteriorates due to varied diffusion lengths
Solution Approach 1:
The patent addresses the high aspect ratio problem by forming metallic silicide films not only on the top surface but also on the side surfaces of the control gate electrode. This multi-dimensional approach ensures uniform silicide formation throughout the entire electrode structure, eliminating variations caused by different diffusion lengths in high aspect ratio geometries.
Solution Approach 2:
The patent applies preliminary action by forming a metallic film on all exposed surfaces (top and side surfaces) of the control gate electrode before heating. This preliminary coating ensures that metallic atoms are available for diffusion from multiple directions, achieving uniform silicide film formation even in high aspect ratio structures where diffusion paths would otherwise vary significantly.
3Manufacturing precision
If metallic atoms diffuse deeper into the polysilicon film to form sufficient silicide volume, then the silicide film thickness is adequate, but agglomeration increases causing electrode deterioration
Solution Approach 1:
The patent applies partial action by forming metallic silicide films with different thicknesses in different regions. The first region has a thicker silicide film (50-200 nm) providing sufficient conductivity, while the second region has a thinner film (5-50 nm) that prevents excessive diffusion and agglomeration. This partial application of thick silicide where needed resolves the contradiction between achieving adequate thickness and preventing deterioration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures consistent resistance values and reduces agglomeration by allowing metallic atoms to diffuse from both the top and side surfaces, forming a uniform metallic silicide film that maintains desired thickness without lengthy diffusion, thereby stabilizing the control gate electrodes and improving device performance.
Implementation Method 1
metallic atoms diffuse into the polysilicon film from a metallic element film provided on the polysilicon film
Implementation Method 2
react with the polysilicon, thereby forming a metallic silicide film
Implementation Method 3
heating the polysilicon film and the metallic film
Data Source
Figure 1
Figure 2A~2C
Figure 3A~3C
AI summary
A semiconductor EEPROM device comprising a first insulating film (14A) provided on a semiconductor substrate (13) in a cell transistor region, a first conductive film (15) provided on the first insulating film, an inter-electrode insulating film (16) provided on the first conductive film, a second conductive film (3a,3b) provided on the inter-electrode insulating film and having a first metallic silicide (3b) film on a top surface thereof, first source/drain regions (23) formed on a surface of the semiconductor substrate, a second insulating film (14B) provided on the semiconductor substrate in at least one of a selection gate transistor region and a peripheral transistor region, a third conductive film (3a,3b,22) provided on the second insulating film and having a second metallic silicide film (22) having a thickness smaller than a thickness of the first metallic silicide film (3b) on a top surface thereof, and a second source/drain (23a,23b) regions formed on the surface of the semiconductor substrate.