EEPROM I2C Bus Write Cycle Optimization

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Solution Overview

Problem

EEPROMs connected to an I2C bus cannot receive data while they are programming others, leading to prolonged write operations, as they can only acknowledge data reception once programming is complete, which restricts bus usage and increases operation duration.

Innovation Solution

Implementing a buffer function within the EEPROM to allow data reception during the programming process, using a virtual or real buffer memory, and modifying the acknowledgement management to enable data transfer while programming is in progress, without altering the I2C protocol or frame structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the EEPROM only acknowledges data reception after programming is complete, then data integrity is ensured, but the bus is blocked during programming and write operation duration increases

Engineering Contradiction:
Improvedata integrityVSAvoidbus blocking time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory is divided into two separate banks (first bank and second bank) that can be independently accessed. While data is being programmed in the first bank, the second bank is available to receive new data, and vice versa. This segmentation allows parallel operations and eliminates the bus blocking issue while maintaining data integrity through proper bank management.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A buffer memory is introduced to temporarily store data before it is programmed into the EEPROM. The buffer receives data in advance during the programming of previous data, allowing the I2C bus to remain active. The data is then transferred from the buffer to the EEPROM memory cells, ensuring data integrity while reducing bus blocking time.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the EEPROM waits for programming completion before acknowledging data, then programming accuracy is ensured, but productivity decreases due to bus unavailability

Engineering Contradiction:
Improveprogramming accuracyVSAvoiddata transfer rate
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

A buffer memory acts as an intermediary between the I2C bus and the EEPROM memory cells. The buffer receives data from the bus and holds it temporarily, allowing the programming operation to proceed independently. This intermediary enables continuous data reception while maintaining programming accuracy through controlled data transfer from the buffer to the memory cells.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system enables continuous data transfer over the I2C bus by allowing the buffer to receive new data while previous data is being programmed into the EEPROM. The programming operation and data reception operate in parallel through the use of buffer and dual banks, eliminating idle time and maintaining continuous productive action without compromising programming accuracy.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9202568B2Mechanism for writing into an EEPROM on an I2C bus
Publication Date: 2015.12.01 STMICROELECTRONICS INT NV
  • US9202568B2 patent drawing
  • US9202568B2 patent drawing
  • US9202568B2 patent drawing

AI summary

A method for writing data into an EEPROM connected to an I2C bus, wherein the data to be written is transmitted in frames having a size corresponding to the size of a physical half-page of the memory. The programming of a data page in the memory is performed while another page is being received.