EEPROM Memory Control Method for Data Reliability and Lifespan

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Solution Overview

Problem

EEPROMs require multiple erasing and programming operations for data longer than one page, leading to increased erasing time, reduced lifespan, and increased storage space requirements due to the need for backup storage regions.

Innovation Solution

A memory control method that determines the data status of memory cells and performs programming and erasing operations to ensure safe data writing, reducing the number of operations needed and optimizing storage space by using a single memory cell for each page of data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a backup storage region is used to prevent data loss during writing operations, then data reliability is improved, but the number of erasing operations increases and device lifespan decreases

Engineering Contradiction:
Improvedata reliabilityVSAvoiddevice lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent extracts the backup storage function from a separate backup storage region and integrates it into the normal storage region by using valid/erased state management. This eliminates the need for dedicated backup regions and reduces the number of erasing operations required, thereby extending device lifespan while maintaining data reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the state management parameters from using separate backup regions to using valid/erased state indicators within the storage region. By tracking which storage locations are in valid or erased states, the system can perform safer writing operations without requiring additional backup regions, thus reducing the total number of erasing operations and extending device lifespan.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a backup storage region is used to prevent data loss during writing operations, then data reliability is improved, but storage space requirements increase

Engineering Contradiction:
Improvedata reliabilityVSAvoidstorage space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the backup storage function with the normal storage function by using the same storage region for both purposes. Instead of having separate backup storage regions, the system uses valid/erased state management within the normal storage region to provide backup functionality, thereby reducing total storage space requirements while maintaining data reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The storage region is made universal by enabling it to serve both as normal storage and as backup storage through state management. By marking storage locations as valid or erased, the same physical storage space can function as either a normal storage location or a backup location, eliminating the need for dedicated backup storage regions and reducing overall storage space requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Quantity of substance

If multiple writing operations are performed for data longer than one page, then complete data storage is achieved, but erasing time increases and productivity decreases

Engineering Contradiction:
Improvedata storage capacityVSAvoiderasing time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent performs preliminary state management by identifying and marking valid/erased states before writing operations. By pre-determining which storage locations are in valid or erased states, the system can optimize the writing process and reduce the number of erasing operations required, thereby reducing erasing time and improving productivity while maintaining complete data storage capacity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10310772B2Memory control method and memory control apparatus
Publication Date: 2019.06.04 SEMICON MFG INT (SHANGHAI) CORP
  • US10310772B2 patent drawing
  • US10310772B2 patent drawing
  • US10310772B2 patent drawing

AI summary

The present disclosure provides memory control methods and memory control apparatus. An exemplary method includes providing a memory having a targeted memory zone, the targeted memory zone having a plurality of memory cells, and a storage capacity of each memory cell being one page; receiving and reading out to-be-stored data and obtaining the targeted address information of the to-be-stored data; reading out data status of all memory cells of a targeted memory zone; determining the data status of the memory cells of the targeted memory zone; performing a programming operation to a memory cell with an erased state to write the to-be-stored data into the memory cell with the erased state; and performing an erasing operation to a memory cell having a logic address of written data to remove the logic address.