EEPROM Metal Layer Opening for Threshold Voltage Matching

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Solution Overview

Problem

The semiconductor industry faces challenges in producing EEPROM devices with transistors that have mismatched threshold voltages, leading to improper operation, and there is a need for a structure that helps in forming transistors with more closely matched threshold voltages.

Innovation Solution

The solution involves forming EEPROM cells with a metal layer that includes an opening overlying a portion of the floating gate and control gate, facilitating more accurate formation of threshold voltage and improving manufacturability by providing a balanced etch profile.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional EEPROM cell structures are used, then manufacturing process is simpler, but transistor threshold voltages are mismatched leading to improper operation

Engineering Contradiction:
Improvetransistor threshold voltage matchingVSAvoidcell structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the EEPROM cell into two symmetrical halves, each containing identical transistor pairs (first and second transistors in each half). This segmentation ensures that corresponding transistors in each half have matched threshold voltages, resolving the reliability issue while maintaining manageable structural complexity through modular symmetry.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces asymmetry in the metal layer configuration by positioning openings asymmetrically relative to the transistor gates. Specifically, the metal layer has a first opening overlying the first transistor gate and a second opening overlying the second transistor gate, with the openings positioned at different locations. This asymmetric metal layer design enables precise control of threshold voltages for each transistor pair, improving matching accuracy.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If threshold voltage matching is improved through additional structures, then device reliability increases, but manufacturing precision requirements increase

Engineering Contradiction:
Improvethreshold voltage matchingVSAvoidetching profile control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the physical and chemical parameters of the metal layer by incorporating specific materials (such as tungsten, cobalt, or copper) and configuring the layer thickness and opening positions. These parameter changes enable the metal layer to provide both structural support and electrical function, improving threshold voltage matching while maintaining manufacturability through standardized material properties and deposition techniques.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If metal layer with openings is added to improve threshold voltage formation, then transistor matching improves, but device complexity increases

Engineering Contradiction:
Improvethreshold voltage formation accuracyVSAvoidmetal layer configuration
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The metal layer serves multiple functions simultaneously: it provides mechanical support for the gate structure, establishes electrical connections, and controls threshold voltage through its opening configuration. This multi-functionality reduces the need for separate dedicated structures, thereby improving manufacturing precision for threshold voltage formation while limiting the increase in overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7825454B2Method of forming an EEPROM device and structure therefor
Publication Date: 2010.11.02 SEMICON COMPONENTS IND LLC
  • US7825454B2 patent drawing
  • US7825454B2 patent drawing
  • US7825454B2 patent drawing

AI summary

In one embodiment, an EEPROM device is formed to include a metal layer having an opening therethrough. The opening overlies a portion of a floating gate of the EEPROM device.