EEPROM Write Cycle Control via Voltage-Adaptive Timing
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Solution Overview
Problem
EEPROM-type memory systems face challenges in efficiently operating over a wide range of supply voltages, particularly at low voltages, leading to write errors and high current consumption, which is detrimental for applications like wireless devices and high-density memory systems.
Innovation Solution
A controlled adaptation of the write cycle time based on the supply voltage is implemented, allowing the charge pump to operate efficiently by increasing the write cycle duration when supply voltage drops, thereby ensuring correct writing and reducing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the charge pump is sized to be reliable under short writing time at low voltage, then writing reliability is improved, but the device area increases and efficiency at high voltage decreases
Solution Approach 1:
The charge pump circuit operates in different modes depending on the supply voltage level. At low supply voltages (below threshold), the circuit enables a first charge pump mode with extended write cycle duration to ensure reliable electron tunneling. At high supply voltages (above threshold), the circuit switches to a second charge pump mode with shorter write cycle duration. This dynamic adaptation allows the same charge pump hardware to be reliably sized for low-voltage operation while maintaining efficiency at high voltages, avoiding the need for an oversized charge pump that would increase device area and reduce high-voltage efficiency.
2Use of energy by moving object
If the supply voltage is reduced to approximately 1.6 volts for wireless systems, then power consumption decreases, but the current consumed by the charge pump increases significantly
Solution Approach 1:
The invention changes the temporal parameter (write cycle duration) to compensate for voltage reduction. When supply voltage drops to approximately 1.6 volts, the circuit detects this condition and automatically extends the write cycle duration. This parameter change allows the charge pump to deliver the necessary charge to the floating gate despite the lower voltage, because the extended time compensates for the reduced voltage-driven current. This resolves the contradiction by maintaining effective charge transfer while operating at low voltage, preventing the need for excessively high instantaneous current that would defeat the power savings.
3Productivity
If the write cycle duration is reduced for high-frequency writing, then productivity increases, but the current consumed by the charge pump increases
Solution Approach 1:
The system dynamically adjusts the write cycle duration based on supply voltage conditions. When operating at high supply voltages, the circuit can support shorter write cycles (high writing frequency) because the higher voltage provides sufficient current to charge the floating gate quickly. When supply voltage drops, the circuit automatically extends the write cycle duration, accepting a lower writing frequency to maintain reliable operation. This dynamic behavior resolves the contradiction by allowing high productivity only when the voltage conditions support it, preventing excessive current consumption while maintaining the ability to achieve high-frequency writing when needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables reliable and efficient operation of EEPROM-type memory systems across a wide voltage range without oversizing the charge pump, reducing energy consumption and preventing write errors.
Implementation Method 1
Programming is performed using the Fowler-Nordheim effect by applying a high voltage pulse, typically in the range of 13 to 15 volts, which injects electrons from the floating gate to the drain via tunneling.
Implementation Method 2
Programming is performed using the Fowler-Nordheim effect by applying a high voltage pulse, typically in the range of 13 to 15 volts, which injects electrons from the floating gate to the drain via tunneling.
Data Source
Figure 1~2B
Figure 3~5
AI summary
The method of controlling a write cycle of at least one data in at least one memory cell of the type electrically programmable and erasable read-only memory disposed in an electronic circuit powered by a supply voltage (Vdd) includes a controlled increase in the duration of the write cycle in the presence of a decrease in the supply voltage (Vdd).