eFlash Data Inversion Encoding for Faster, Lower-Stress Programming

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Solution Overview

Problem

Existing embedded flash (eFlash) memory programming operations are inefficient when there are many '0's in the data bits, leading to increased programming time and reduced memory endurance and lifespan.

Innovation Solution

A data inversion encoding circuit that counts bit values, inverts bits when '0's outnumber '1's, and uses unprogrammed memory cells for source line pull down, eliminating the need for external circuits or dummy cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional programming operation is performed on eFlash memory, then data can be written to memory cells, but programming time increases and memory endurance decreases when there are many '0's in the data bits

Engineering Contradiction:
Improveprogramming speedVSAvoidprogramming time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies bit inversion encoding where the data bits are inverted before programming. When the number of '0's exceeds the number of '1's in the original data, the bits are inverted so that fewer bits need to be programmed. This inversion strategy reduces the programming time and improves productivity by minimizing the number of write operations required.

Inventive Principle:
Principle #13The other way round (Inversion)

2Productivity

If traditional programming operation is performed on eFlash memory, then data can be written to memory cells, but memory endurance and lifespan become unfavorable when many bits need to be programmed

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidmemory endurance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By inverting the data bits before programming, the patent reduces the total number of programming operations required. This decreases the cumulative stress on memory cells, thereby improving memory endurance and lifespan. The inversion strategy transforms a high-programming-count scenario into a low-programming-count scenario, enhancing reliability.

Inventive Principle:
Principle #13The other way round (Inversion)

3Ease of operation

If external circuits or dummy cells are used for source line pull down, then source line pull down function is achieved, but device complexity increases

Engineering Contradiction:
Improvesource line pull down functionVSAvoidcircuit complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent makes the memory cells serve dual functions: storing data and providing source line pull down capability. By utilizing the same memory cell array for both data storage and source line pull down, the patent eliminates the need for separate external circuits or dummy cells, thereby reducing device complexity while maintaining the source line pull down function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory cells themselves provide the source line pull down function without requiring external assistance. The unprogrammed memory cells automatically serve as pull-down elements, making the system self-sufficient and eliminating the need for additional dedicated circuits for this function.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250372174A1DATA INVERSION ENCODING CIRCUIT, eFLASH MEMORY DEVICE AND OPERATION METHOD THEREOF
Publication Date: 2025.12.04 UNITED MICROELECTRONICS CORP
  • US20250372174A1 patent drawing
  • US20250372174A1 patent drawing
  • US20250372174A1 patent drawing

AI summary

Disclosed are a data inversion encoding circuit, an eFLASH memory device and an operation method thereof. The data inversion encoding circuit includes a count and comparison circuit, receiving data with plural bits, counting numbers of 0 and 1 in the bits, and outputting a selection signal when number of 0 is larger than number of 1; an inverter, receiving the data and outputting bit inversion data; and a selection circuit, receiving the data and the bit inversion data, and selecting the data or the bit inversion data based on the selection signal. The bit inversion data is output when number of 0 is larger than number of 1.