Compact eFuse Array with Segmented Switches for Area Reduction
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Solution Overview
Problem
Conventional electrically programmable fuse (eFuse) cell arrays have a large area occupancy due to the size of switches required for high write currents, and the read current is limited, which restricts the number of read operations and does not significantly reduce the overall area.
Innovation Solution
The proposed solution involves an array of eFuse units with connecting switches between adjacent units, allowing for a reduced size of write and read/write switches by distributing the write current across multiple switches, thereby minimizing the overall area and increasing the number of read operations without damaging the eFuse units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a single large switch is used to pass through high write current in a conventional eFuse unit, then the write current can be sufficiently high for reliable fusing, but the switch occupies most of the eFuse unit area (80%), resulting in large area occupancy
Solution Approach 1:
The patent divides the single large switch into multiple smaller switches (first switch and second switch) that are connected in parallel. Each switch handles a portion of the write current, allowing the use of smaller transistor sizes while collectively providing the required high write current capability. This segmentation reduces the total area occupied by switches in the eFuse unit.
2Productivity
If the read current is reduced to increase the number of read operations, then the read NMOS transistor can be very small, but the overall eFuse unit area does not significantly reduce compared to conventional structures
Solution Approach 1:
The patent segments the current paths by introducing multiple switches that share the write current load. This allows the read switch to be optimized for low current operation (small size) while the parallel configuration of multiple switches provides the necessary write current capability, achieving both high read operation count and reduced area.
Solution Approach 2:
The patent introduces a new structural dimension by connecting multiple eFuse units in series through common nodes and using connecting switches between them. This series connection configuration allows the read current to flow through multiple units, effectively increasing the read operation capacity without requiring proportionally larger individual switches, thereby reducing overall area.
3Area of stationary object
If multiple eFuse units are connected in series through common nodes with connecting switches, then the area of individual switches can be reduced, but the device complexity increases due to additional wiring and switch configurations
Solution Approach 1:
The patent designs the connecting switches and common nodes to serve multiple functions: they enable series connection of eFuse units for area reduction, provide current distribution paths for write operations, and facilitate read operations across multiple units. This multi-functionality reduces the need for separate dedicated components, managing complexity while achieving area savings.
Data Source
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AI summary
A array of electrically programmable fuse (eFuse) units includes at least one connecting switch connecting two adjacent eFuse units. Each eFuse unit includes an eFuse, a write switch for passing through a first portion of a write current, a read/write switch for passing through a second portion of the write current or a read current, and a common node. The eFuse, the write switch, the read/write switch, and the at least one connecting switch are connected to each other at the common node. By turning on and off the at least one connecting switch, the current is split among the eFuse units, so that the size of the write switch can be reduced, thus reducing the total area of the array.