E-fuse Circuit Boot-up Failure Detection
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Solution Overview
Problem
In semiconductor memory devices, the occurrence of failed cells leads to reduced yield and increased manufacturing costs due to the inability to properly perform operations, and existing repair methods are inefficient in detecting and processing failed cells during boot-up operations.
Innovation Solution
An E-fuse circuit is introduced that includes a boot-up controller, selection circuit, decoder, E-fuse array, sensing circuit, and fail controller to detect and store failed addresses, allowing for the processing of failed parts during boot-up and preventing their usage, thereby increasing yield and reducing test time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional repair circuits are used to replace failed cells with redundancy cells, then failed cells can be repaired, but the process is inefficient and cannot detect failed parts during boot-up operations
Solution Approach 1:
The patent implements preliminary detection of failed E-fuse parts during boot-up operations by storing failed addresses in a separate storage circuit. This allows the system to identify and mark failed parts before normal operations begin, enabling efficient handling of failures without affecting production yield or requiring extended test time.
2Measurement precision
If E-fuse testing is performed thoroughly to detect failed parts, then detection accuracy improves, but testing time increases
Solution Approach 1:
The system performs preliminary detection of failed E-fuse addresses during boot-up by activating the fail controller and storage circuit early in the operation sequence. This preliminary action captures all failed addresses before normal testing proceeds, achieving complete detection accuracy without extending the main testing timeline.
Solution Approach 2:
The patent introduces a separate storage circuit as an intermediary component dedicated to storing failed addresses. This mediator isolates the detection function from the main testing process, allowing accurate recording of failures without interfering with or extending the primary test operations.
3Loss of time
If failed parts are processed during boot-up operations, then test time is reduced, but the complexity of the E-fuse circuit increases
Solution Approach 1:
The patent segments the E-fuse circuit into distinct functional modules: the E-fuse array, fail controller, and separate storage circuit. This segmentation allows the failure detection and storage functions to operate independently during boot-up, reducing test time without requiring complex integration that would increase overall circuit complexity.
Solution Approach 2:
A separate storage circuit acts as an intermediary component that handles failed address storage independently. This mediator approach adds minimal complexity by using a dedicated storage element rather than integrating failure handling into the existing complex E-fuse control logic.
Data Source
AI summary
An electrical fuse (E-fuse) circuit is disclosed, which relates to a technology for processing a failed part of the E-fuse circuit. The E-fuse circuit comprising: a boot-up controller configured to generate at least one fuse address and a sensing enable signal, an electrical fuse (E-fuse) array configured to include a plurality of fuse sets, and configured to output fuse data including failed data if a failure has occurred in an E-fuse of the plurality of fuse sets, based on the fuse address and the sensing enable signal, a fail controller configured to detect failed data from the fuse data, and output a failed signal and a failed address storage circuit configured to store a failed address from among the fuse addresses based on the failed signal.