eFuse Structure With Dummy Buried Word Line for Breakdown Control
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Solution Overview
Problem
The miniaturization of memory devices makes it difficult to control the location of dielectric breakdown in electronic fuse (eFuse) structures, leading to unpredictable resistance values and reduced yield and reliability.
Innovation Solution
A memory device with an eFuse structure that includes a gate oxide layer, doped regions, a dummy buried word line, and an eFuse gate electrode, where the eFuse gate electrode is electrically isolated from the dummy buried word line, allowing controlled dielectric breakdown and improved resistance distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the length of the conductive path in the eFuse structure is reduced to lower resistance, then the resistance value decreases, but the location of dielectric breakdown becomes difficult to control and randomness increases
Solution Approach 1:
The eFuse structure is segmented into multiple functional layers including a gate oxide layer, a dummy buried word line, and an eFuse gate electrode. The dummy buried word line acts as a separate segment that is electrically isolated from the eFuse gate electrode, creating distinct functional zones that enable controlled dielectric breakdown while maintaining simple overall structure.
Solution Approach 2:
The dummy buried word line serves as an intermediary element between the gate oxide layer and the eFuse gate electrode. This intermediary structure enables controlled dielectric breakdown by providing a specific location for the breakdown to occur, while being electrically isolated from the eFuse gate electrode to maintain proper eFuse functionality.
2Volume of moving object
If miniaturization is pursued to reduce memory device size, then device dimensions decrease, but control over dielectric breakdown location in eFuse becomes more difficult
Solution Approach 1:
The dummy buried word line introduces local quality variation into the eFuse structure by creating a specific region with different electrical properties. This localized structure provides a preferred site for dielectric breakdown to occur, ensuring controlled breakdown location even as the overall device dimensions are reduced through miniaturization.
Solution Approach 2:
The dummy buried word line is formed in advance during the manufacturing process, establishing a predetermined location for dielectric breakdown before the actual eFuse operation. This preliminary structural preparation ensures that breakdown occurs at the intended location, maintaining manufacturing precision despite device miniaturization.
3Productivity
If conventional eFuse formation processes are used, then manufacturing is simpler, but resistance value distribution is wider and yield is reduced
Solution Approach 1:
The formation of the dummy buried word line is merged with the existing buried word line formation process. By combining these processes, the patent achieves controlled dielectric breakdown location without significantly increasing manufacturing complexity, thereby improving yield while maintaining ease of manufacture.
Solution Approach 2:
The dummy buried word line serves multiple functions: it provides a controlled location for dielectric breakdown, acts as an electrical isolation layer, and can be formed using existing manufacturing processes. This multi-functionality improves yield without requiring entirely new manufacturing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the resistance values and distribution of the eFuse structure, thereby improving the performance and yield of the memory device, while also simplifying the manufacturing process and reducing production costs by integrating eFuse formation with array and peripheral region processes.
Implementation Method 1
When the operation of writing is performed, a high voltage is applied to the two conductive structures to breakdown the dielectric layer, thereby forming a permanent conductive path in the dielectric layer
Data Source
AI summary
A memory device includes a substrate and an eFuse structure. The substrate includes an array region and an eFuse region and the eFuse region of the substrate has an eFuse trench. The eFuse structure includes a first gate oxide layer, a plurality of doped regions, a dummy buried word line, and an eFuse gate electrode. The first gate oxide layer is conformally formed on a surface of the eFuse trench. The doped regions are respectively formed in the substrate on opposite sides outside the eFuse trench, and in contact with the first gate oxide layer. The dummy buried word line is formed on the first gate oxide layer. The eFuse gate electrode is formed on the dummy buried word line and in contact with the first gate oxide layer. The dummy buried word line is electrically isolated from the eFuse gate electrode.