eFuse Structure Using Gate Metal Layer for Low Current Programming
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Solution Overview
Problem
Conventional eFuses are not compatible with the Gate-Last High-K Metal Gate (HKMG) process and require high current levels for programming, which is not suitable for 28 nm foundry technology.
Innovation Solution
The development of an eFuse structure using a gate metal layer as the fuse material, with a fuse neck region made of undoped poly silicon and high-K dielectric, allowing for low current programming and compatibility with the HKMG process, enabling smaller fuse size and reduced current requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional eFuse structures are used, then programming can be achieved, but high current levels (hundreds of microamps) are required and compatibility with HKMG process is lost
Solution Approach 1:
The patent changes the material parameters of the fuse structure by replacing conventional materials with gate metal layer materials having different electrical properties. The gate metal layer has lower resistance and different breakdown characteristics, enabling programming at lower current levels (microamps instead of hundreds of microamps) while maintaining reliable fuse functionality.
Solution Approach 2:
The patent employs a composite structure combining high-K dielectric material and gate metal layer to create the fuse element. This composite material system leverages the high dielectric constant for field enhancement and the metal layer for controlled breakdown, achieving both low programming current and HKMG process compatibility.
2Reliability
If conventional eFuse structures are used, then fuse functionality is achieved, but compatibility with 28 nm HKMG process is lost
Solution Approach 1:
The patent makes the fuse structure universal by using the same gate metal layer and high-K dielectric materials that are already present in the HKMG process for transistor fabrication. This allows the fuse to be fabricated using the existing process infrastructure without requiring separate material deposition or additional process steps, achieving both functionality and adaptability.
Solution Approach 2:
The fuse structure utilizes the gate metal layer and high-K dielectric that are already deposited during the HKMG process for transistor gate formation. The same process steps that create the transistor gates also create the fuse elements, making the system self-sufficient and eliminating the need for additional material processing steps.
3Reliability
If conventional fuse materials are used, then fuse operation is achieved, but larger fuse size is required
Solution Approach 1:
The patent changes the electrical parameters of the fuse by using gate metal layer materials with lower resistance and different breakdown characteristics. This allows for a smaller fuse area to achieve the same programming effect, as the material properties enable more efficient current confinement and breakdown at reduced dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for the fabrication of OTP memory that is fully compatible with 28 nm gate last high-K metal gate processes, requiring lower current for programming and enabling smaller device sizes, while being fabricated in the same process as main-line FETs without additional masks or processes.
Implementation Method 1
The use of the high-K dielectric allows for further miniaturization of micro-electrical components
Implementation Method 2
The HKMG process allows for a high-K dielectric to replace the silicon dioxide gate dielectric that was used in previous generations of foundry technology
Data Source
AI summary
An eFuse structure having a first metal layer serving as a fuse with a gate including an undoped polysilicon (poly), a second metal layer and a high-K dielectric layer all formed on a silicon substrate with a Shallow Trench Isolation formation, and a process of fabricating same are provided. The eFuse structure enables use of low amounts of current to blow a fuse thus allowing the use of a smaller MOSFET.