E-fuse Device Integrating Detection and Transfer Circuits
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Solution Overview
Problem
Conventional e-fuse trimming devices face limitations in scaling down due to optics and mechanics, leading to high power consumption and larger area requirements for high-speed data storage, as well as uncertainty in proper melting of fuses, which is not efficiently addressed by static random-access memory.
Innovation Solution
An e-fuse device comprising a fusing circuit, a detecting-and-outputting circuit, and a transferring circuit, implemented using MOS technology, which allows for smaller area occupation and lower power consumption by integrating these circuits within the e-fuse cell, enabling operation in fusing, data-transferring, and data-detecting modes without the need for additional static random-access memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If static random-access memory is employed to pre-store information related to the e-fuse array, then high-speed operation is satisfied, but power consumption increases and area occupied increases
Solution Approach 1:
The patent extracts the information storage function from the static random-access memory and implements it directly within the e-fuse array structure. Each e-fuse device contains integrated circuits that can store operational information locally, eliminating the need for external pre-storage memory and reducing power consumption while maintaining high-speed operation capability.
Solution Approach 2:
The patent merges the storage function with the e-fuse array by integrating circuits within each e-fuse device that can pre-store and process information. This combination eliminates the separate static random-access memory component, reducing both area occupation and power consumption while maintaining the required high-speed operation through the integrated architecture.
2Speed
If static random-access memory is employed to pre-store information related to the e-fuse array, then high-speed operation is satisfied, but area occupied increases
Solution Approach 1:
The patent merges the storage function with the e-fuse array by integrating circuits within each e-fuse device that can pre-store and process information. This combination eliminates the separate static random-access memory component, reducing both area occupation and power consumption while maintaining the required high-speed operation through the integrated architecture.
Solution Approach 2:
The integrated circuits within each e-fuse device perform multiple functions: they can pre-store information, process data, and control the fusing operation. This multi-functionality eliminates the need for separate static random-access memory, reducing overall area occupation while maintaining high-speed operation capability through the universal integrated structure.
3Area of stationary object
If e-fuse array is used to reduce area, then area occupied by e-fuses is reduced, but high-speed requirements and low power consumption cannot be satisfied simultaneously
Solution Approach 1:
The patent implements dynamic control within each e-fuse device through integrated circuits that can adaptively manage the fusing process. These circuits enable real-time decision-making and control, allowing the system to operate at high speeds while maintaining low power consumption by dynamically adjusting operations based on actual conditions rather than relying on static pre-stored information from external memory.
Solution Approach 2:
Each e-fuse device is equipped with integrated circuits that enable it to autonomously perform data processing and control functions. This self-service capability allows the e-fuse array to operate at high speeds without external memory support, reducing both area occupation and power consumption while maintaining the required operational performance through self-contained intelligent devices.
4Area of stationary object
If e-fuse array is used to reduce area, then area occupied by e-fuses is reduced, but low power consumption cannot be satisfied simultaneously with high-speed operation
Solution Approach 1:
The patent implements dynamic control within each e-fuse device through integrated circuits that can adaptively manage the fusing process. These circuits enable real-time decision-making and control, allowing the system to operate at high speeds while maintaining low power consumption by dynamically adjusting operations based on actual conditions rather than relying on static pre-stored information from external memory.
Solution Approach 2:
Each e-fuse device is equipped with integrated circuits that enable it to autonomously perform data processing and control functions. This self-service capability allows the e-fuse array to operate at high speeds without external memory support, reducing both area occupation and power consumption while maintaining the required operational performance through self-contained intelligent devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces overall area and power consumption while ensuring high-speed data storage by integrating the necessary circuits within the e-fuse device, allowing for efficient detection and fusing operations without additional memory, thus addressing the limitations of conventional e-fuse arrays.
Implementation Method 1
the fusing circuit fuses the e-fuse cell according to the fusing signal and the output signal
Data Source
AI summary
An e-fuse device includes a transferring circuit, a detecting-and-outputting circuit, and a fusing circuit. The transferring circuit transfers an input signal to a data node. The detecting-and-outputting circuit generates an output signal according to the logic level of the data node. The fusing circuit includes an e-fuse cell, a first transistor, a second transistor, and a switch element. The e-fuse cell is coupled between a high-voltage node supplied with the high voltage or a ground and a first node. The first transistor is coupled between the first node and a second node and is controlled by the output signal. The second transistor is coupled between the second node and the ground and is controlled by a fusing signal. The switch element is coupled between the first node and the data node and is controlled by a switch signal.