eFuse Circuit with Parallel Program Devices
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Solution Overview
Problem
Integrated circuits (ICs) with one-time-programmable (OTP) memory elements face challenges in efficiently determining the status of electrical fuses (eFuses) due to high power consumption during read operations, as existing approaches use a single program device for both programming and reading, leading to increased power usage.
Innovation Solution
The implementation of a circuit configuration that includes two separately controllable program devices in parallel with an eFuse, allowing for reduced power consumption during read operations by using FinFETs as program devices, which enables smaller read currents compared to traditional single-device approaches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single program device is used for both programming and reading eFuse, then device complexity is reduced, but power consumption during read operations increases
Solution Approach 1:
The patent divides the single program device into two separate program devices: a first program device coupled in series with the eFuse, and a second program device coupled in parallel. This segmentation allows independent control of programming and reading operations, enabling the second device to supply read current while the first device remains inactive during reads, thus reducing power consumption while maintaining operational simplicity
Solution Approach 2:
The patent creates a multi-functional program device configuration where the first program device handles programming operations and the second program device handles reading operations. This universal design allows each device to be optimized for its specific function while collectively providing both programming and reading capabilities, resolving the contradiction between device simplicity and power efficiency
2Area of stationary object
If traditional program devices are used for eFuse programming, then programming current path resistance is high, but FinFET implementation reduces area requirements
Solution Approach 1:
The patent transitions from traditional planar transistor structures to FinFET architecture, fundamentally changing the physical parameters of the program devices. This parameter change enables reduced area occupation while maintaining or improving electrical characteristics including current path resistance, as FinFETs provide better control over current flow and higher density integration
Data Source
AI summary
A circuit includes an eFuse and a first program device coupled in series between a bit line and a program node, and a second program device configured in parallel with the first program device. The first program device and the second program device are separately controllable.