Hidden Security Key in eFuses via Race Condition Circuits
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Solution Overview
Problem
Electronic Fuses (eFuses) are vulnerable to security breaches as their physical design allows for visible reading of data, posing a risk to stored security communication keys and sensitive information.
Innovation Solution
A method and circuit implementing a hidden security key using a race condition circuit coupled with a latching structure, where drive strengths are stored in eFuses to create a visibly-secure data storage method, requiring multiple chips to reverse-engineer the data and increasing the work required to access secure information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If data is stored directly in eFuses, then data storage is simple and readable, but security is compromised as data can be visibly read by delayering the chip
Solution Approach 1:
The patent introduces an intermediary encoding mechanism where data is not stored directly in eFuses but through a race condition circuit that converts data bits into drive strength configurations. This intermediary layer transforms readable eFuse states into unreadable circuit timing characteristics, preventing direct visual reading while maintaining data storage functionality.
Solution Approach 2:
The patent changes the storage parameter from direct data bits to drive strength parameters. Instead of storing data as binary states in eFuses, the system stores drive strength values that control circuit timing. This parameter transformation makes the stored information unreadable in its original form while preserving the ability to retrieve it through circuit operation.
2Object-affected harmful factors
If a race condition circuit is used to hide data, then security is enhanced by making data unreadable, but device complexity increases due to additional circuit components
Solution Approach 1:
The patent implements multi-functionality by having the race condition circuit serve both as a data storage mechanism and a security obfuscation device. The same circuit structure that creates timing races also performs the data encoding function, eliminating the need for separate encoding hardware and reducing overall system complexity despite the security enhancements.
3Object-affected harmful factors
If drive strengths are stored in eFuses for race condition circuit, then data becomes securely hidden, but reverse engineering requires multiple chips and exponential work increase
Solution Approach 1:
The patent segments the data storage across multiple eFuse locations that control different stages of the race condition circuit. Each eFuse group controls a specific circuit stage's drive strength, and all segments must be analyzed together to reconstruct the original data. This segmentation distributes the security burden across multiple points, making reverse engineering require analysis of the entire circuit rather than a single storage location.
Data Source
AI summary
A method and circuit for implementing a hidden security key in Electronic Fuses (eFuses), and a design structure on which the subject circuit resides are provided. The circuit includes a race condition circuit coupled to a latching structure. The race condition circuit is characterized including respective driver strengths of each stage in the race as well as a sampling clock during chip testing. The data is used to store drive strengths for each stage in eFuses and is used to get a logical one or logical zero out of the final latching stage of the race condition circuit.