eGPIO Boundary Scan Cell With Shared Level Shifters
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Solution Overview
Problem
Conventional I/O architectures for semiconductor chips face challenges with increased number of I/O pads, limited flexibility in re-purposing dedicated I/Os, and high yield risk due to the need for extensive high voltage circuitry and silicon area overhead in advanced technology nodes.
Innovation Solution
The implementation of an extended General Purpose I/O (eGPIO) boundary scan cell that reduces high voltage routing and enhances multiplexing capabilities by sharing high voltage level shifters and infrastructure across input, output, and test logic paths, allowing signals to be processed and routed in core voltage domains before being level shifted to the pad voltage domain, thereby minimizing high voltage wire routing and optimizing silicon area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional I/O architecture is used with separate dedicated I/O paths for each voltage domain, then signal routing is straightforward, but the number of I/O pads increases and silicon area overhead increases
Solution Approach 1:
The patent merges multiple voltage domain interfaces into a single I/O pad by combining level shifters for different voltage domains (first voltage domain, second voltage domain, and pad voltage domain) into one shared interface. This allows the same physical pad to handle signals from multiple voltage domains sequentially, reducing the total number of I/O pads required while maintaining signal routing capability.
Solution Approach 2:
The I/O pad is designed with multi-functionality to serve multiple voltage domains. The level shifter circuitry is configured to accept inputs from different voltage domains and convert them to the pad voltage domain, enabling a single pad to perform multiple functions that previously required separate dedicated pads for each voltage domain.
2Reliability
If dedicated I/O pads are assigned to each voltage domain, then voltage domain isolation is maintained, but flexibility in re-purposing I/Os is limited
Solution Approach 1:
The patent implements dynamic voltage domain isolation by using controllable level shifters that can be selectively enabled or disabled based on which voltage domain is currently active. The circuit includes control logic that ensures only one voltage domain is connected to the pad at a time, maintaining isolation while allowing flexible re-purposing of the same pad for different voltage domains as needed.
Solution Approach 2:
The level shifter acts as an intermediary between different voltage domains and the pad. It provides controlled interface that maintains voltage domain isolation while enabling the pad to communicate with multiple voltage domains sequentially. The level shifter mediates the voltage level differences and prevents direct coupling between voltage domains, ensuring isolation while enabling versatility.
3Adaptability or versatility
If extensive high voltage circuitry is used to support multiple voltage domains, then voltage domain support is comprehensive, but yield risk increases
Solution Approach 1:
The patent combines high voltage level shifter circuits into a shared resource that serves multiple voltage domains. Instead of having separate high voltage circuitry for each voltage domain, a single level shifter infrastructure is used to handle conversions from both the first and second voltage domains to the pad voltage domain, reducing the total amount of high voltage circuitry and associated yield risks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient multi-voltage I/O muxing without substantial high voltage circuitry, reduces silicon area usage, and extends the reuse of I/Os dedicated to always-on subsystems for collapsible I/O signals, thereby improving yield and flexibility in semiconductor chip design.
Implementation Method 1
the output path having a first level shifter to up shift the output signals from the first voltage domain or the second voltage domain to the pad voltage domain
Implementation Method 2
the input path having a second level shifter to down shift the input signals from the pad voltage domain to the second voltage domain
Data Source
AI summary
An extended General Purpose Input/Output (eGPIO) scheme is disclosed. In some implementations, an input/output (I/O) boundary scan cell comprises an output path to route output signals from a first voltage domain and signals from a second voltage domain to an I/O pad operating in a pad voltage domain, the output path having a first level shifter to up shift the output signals from the first voltage domain or the second voltage domain to the pad voltage domain; an input path to receive input signals from the I/O pad, the input path having a second level shifter to down shift the input signals from the pad voltage domain to the second voltage domain; and test logic to test signals in the first voltage domain and the second voltage domain.