Egress Clock Domain Synchronization for Multiple Ingress Sources

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Solution Overview

Problem

Current optical network transport equipment loses timing transparency when aggregating traffic from multiple clients with different clock domains, leading to latency and reduced system efficiency, as it can only select one reference clock and discard the others.

Innovation Solution

The system synchronizes multiple clock domains by transmitting clock domain information from ingress line cards to egress line cards, allowing each egress interface to generate a synchronized clock independent of others, thereby preserving timing information and enabling simultaneous synchronization with multiple clock domains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If the transport equipment selects one reference clock from multiple traffic streams, then the system can maintain a single system reference clock, but the timing information from other traffic streams is lost

Engineering Contradiction:
Improvetiming informationVSAvoidclock domain synchronization
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The system segments the clock domain synchronization by creating separate clock recovery paths for each egress interface. Each interface independently recovers and synchronizes to its corresponding ingress clock domain, rather than forcing all interfaces to use a single selected reference clock. This segmentation preserves timing information from all traffic streams while maintaining manageable complexity through modular interface-level processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The transport equipment is designed with universal clock recovery capabilities that can handle multiple clock domains simultaneously. Each egress interface is equipped with the functionality to independently recover, validate, and synchronize to its associated ingress clock domain, making the system capable of supporting multiple timing references without requiring separate dedicated hardware for each clock domain.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of information

If the transport equipment aggregates traffic from multiple clients into a single pipe, then the transport capability is simplified, but the timing transparency is lost

Engineering Contradiction:
Improvetiming transparencyVSAvoidsystem efficiency
Core Design Contradiction:
Loss of informationVSProductivity

Solution Approach 1:

The aggregation process is segmented to preserve timing transparency. Instead of merging all traffic streams into a single synchronized pipe, the system maintains separate timing channels for each client, allowing timing information to pass through the transport equipment transparently while still enabling efficient bulk transport of multiple traffic streams through the same physical infrastructure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies local quality preservation by maintaining timing transparency specifically at each interface level while allowing aggregate transport efficiency at the system level. Each interface preserves its timing characteristics locally, while the overall system achieves high productivity through efficient resource sharing and multiplexing of the transport medium.

Inventive Principle:
Principle #3Local quality

3Loss of information

If buffering mechanisms are incorporated to support different clock domains, then timing information is preserved, but latency is added and clients cannot transmit at full capacity

Engineering Contradiction:
Improvetiming informationVSAvoidlatency
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The system performs preliminary clock domain identification and association at the ingress side, establishing the relationship between ingress and egress interfaces before traffic arrives. This preliminary action allows the egress side to directly synchronize to the correct clock domain without requiring buffering or waiting, enabling clients to transmit at full capacity while preserving timing information through direct clock domain mapping.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces clock domain information as an intermediary that carries timing reference data through the transport equipment. This intermediary enables direct synchronization between ingress and egress interfaces without requiring physical buffering of data streams, thereby preserving timing information while avoiding the latency and capacity constraints that would result from buffering mechanisms.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP2764644B1Egress clock domain synchronization to multiple ingress clocks
Publication Date: 2021.12.22 CISCO TECHNOLOGY INC
  • EP2764644B1 patent drawingFigure 1
  • EP2764644B1 patent drawingFigure 2
  • EP2764644B1 patent drawingFigure 3

AI summary

Synchronization techniques for multiple clock domains from two or more clients or common pluggable interfaces connected to multiple interfaces on one or more ingress line cards to multiple interfaces on one or more egress line cards are provided. The plurality of clock domain information from the clients that are connected on the ingress side is transmitted to the egress line cards. Two or more egress interfaces generate different clocks that are synchronized to the multiple clock domains.