Egress Compute Architecture for Network Switches in Distributed AI

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Solution Overview

Problem

Distributed deep learning systems face significant bottlenecks due to network latency and limited bandwidth, particularly in centralized parameter server architectures, which hinder the performance of gradient reduction and propagation across compute nodes.

Innovation Solution

Embedding compute logic within network switches to perform collective actions such as reduction operations on gradients, reducing the need for nodes to communicate with a centralized server by processing data within the switch, thereby minimizing network latency and overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a centralized parameter server architecture is used, then gradient aggregation can be performed, but network latency and bandwidth limitations create bottlenecks that reduce system productivity

Engineering Contradiction:
Improvegradient aggregation capabilityVSAvoidsystem throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the centralized parameter server functionality by distributing compute logic to individual network switches. Each switch independently performs gradient aggregation for its connected compute nodes, eliminating the single-point bottleneck and enabling parallel processing across multiple switches.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new architectural dimension by embedding compute capabilities directly within the network switch fabric. This transforms the traditional two-tier architecture (compute nodes + parameter server) into a three-dimensional structure where switches become active participants in gradient aggregation, reducing communication hops and latency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of time

If compute logic is embedded within network switches, then communication overhead is reduced, but device complexity increases

Engineering Contradiction:
Improvecommunication overheadVSAvoidswitch architecture
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent merges packet forwarding and gradient aggregation functions into a single network switch device. By combining these previously separate functions, the system reduces the number of communication steps and data movements, thereby lowering communication overhead despite the increased functional integration.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The network switch is designed with multi-functionality, serving both as a packet forwarding device and a gradient aggregation compute node. This universal design allows the same hardware infrastructure to handle both traditional networking tasks and distributed computing workloads, reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Quantity of substance

If gradient aggregation is performed at the switch level, then bandwidth requirements are reduced, but the switch must handle additional processing loads

Engineering Contradiction:
Improvenetwork bandwidth consumptionVSAvoidprocessing capacity
Core Design Contradiction:
Quantity of substanceVSPower

Solution Approach 1:

The patent implements preliminary action by performing gradient aggregation locally at the network switch before data needs to be transmitted across the wider network. This early aggregation reduces the volume of data that requires network transmission, thereby reducing bandwidth consumption while distributing the processing load across multiple switches.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10931602B1Egress-based compute architecture for network switches in distributed artificial intelligence and other applications
Publication Date: 2021.02.23 INNOVIUM INC
  • US10931602B1 patent drawing
  • US10931602B1 patent drawing
  • US10931602B1 patent drawing

AI summary

Distributed machine learning systems and other distributed computing systems are improved by embedding compute logic at the network switch level to perform collective actions, such as reduction operations, on gradients or other data processed by the nodes of the system. The switch is configured to recognize data units that carry data associated with a collective action that needs to be performed by the distributed system, referred to herein as “compute data,” and process that data using a compute subsystem within the switch. The compute subsystem includes a compute engine that is configured to perform various operations on the compute data, such as “reduction” operations, and forward the results back to the compute nodes. The reduction operations may include, for instance, summation, averaging, bitwise operations, and so forth. In this manner, the network switch may take over some or all of the processing of the distributed system during the collective phase.