Egress Packet Marking Engine for Network Throughput
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Solution Overview
Problem
Current packet processing architectures face limitations in handling high data throughputs and diverse packet formats, leading to bottlenecks that restrict achievable data throughput and supported packet formats.
Innovation Solution
A system and method for egress data packet marking, utilizing a processor and memory elements to store packet quality of service indicators, allowing for flexible and programmable marking based on quality of service commands, which enhances the handling of diverse packet formats and improves throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If current packet processing architectures are used, then data throughput can be handled, but bottlenecks occur that limit achievable data throughput and packet format diversity
Solution Approach 1:
The packet processing architecture is segmented into multiple independent marking engines, each capable of handling specific marking operations. This divides the monolithic processing bottleneck into parallel, manageable units that can operate simultaneously, increasing overall throughput without proportionally increasing complexity.
Solution Approach 2:
The system employs dynamic quality of service field selection where the marking engine can adaptively choose which QoS fields to modify based on packet characteristics and current network conditions. This dynamic approach allows the architecture to handle diverse packet formats efficiently without requiring fixed, complex routing logic for each format type.
2Ease of operation
If fixed packet marking methods are used, then simple processing is achieved, but flexibility and programmability are limited
Solution Approach 1:
The marking engine is designed as a universal, programmable device that can perform multiple marking operations on different QoS fields (such as DSCP, 802.1p, MPLS EXP) within a single processing pipeline. This multi-functionality provides flexibility without requiring separate dedicated hardware for each marking type, thereby avoiding exponential complexity growth.
Solution Approach 2:
The system allows dynamic changing of marking parameters including which QoS fields are modified, the marking values applied, and the conditions under which marking occurs. This parameter-based control provides programmability and flexibility while maintaining a relatively simple core processing architecture that doesn't require complex reconfiguration.
Data Source
AI summary
A packet processing system architecture and method are provided. According to one implementation, the system can include a first and second memory elements and a processor. The first memory element may be utilized for storing: A plurality of packet quality of service indicators; A first packet quality of service field; and A second packet quality of service field. The second memory element is utilized for storing a plurality of second packet quality of service indicators. The processor is operatively coupled to the memory elements for receiving quality of service commands, wherein the service commands include a plurality of third packet quality of service indicators. The processor uses an index to search the second memory element and the search returns a subset of the plurality of second packet quality of service indicators. The index may be the egress marking set or a queue number. The processor then creates a modified data packet by determining which of the packet quality of service fields to insert in the data packet, wherein the determination is based on the one or more quality of service commands.