EL Display Gate Line Segmentation for Brightness Uniformity
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Solution Overview
Problem
Conventional thin film semiconductor devices for EL display panels face issues with uneven brightness due to high line resistance in gate lines, voltage drops, and limited space for arranging thin film transistors, which affect the panel's brightness and lifespan.
Innovation Solution
The EL display panel design includes a thin film semiconductor unit with a gate electrode and gate line formed in different layers, allowing for the selection of materials to reduce line resistance and parasitic capacitance, and the power supply line is integrated with the gate line to reduce space requirements and improve aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If gate lines are formed in the same layer as gate electrodes using conventional materials, then manufacturing process is simplified, but line resistance increases causing uneven brightness
Solution Approach 1:
The gate line is divided into two separate layers: a first gate line layer formed in the same layer as gate electrodes using high heat conductivity material, and a second gate line layer formed above it using low resistance material. This segmentation allows each layer to perform its specific function - the first layer provides heat conductivity for laser annealing, while the second layer provides low resistance for uniform brightness.
Solution Approach 2:
The gate line structure uses composite material arrangement by combining different materials in different layers. The first gate line layer uses material with high heat conductivity (for laser annealing efficiency), while the second gate line layer uses material with low resistance (for reducing voltage drop). This composite approach optimizes both manufacturing and performance.
2Reliability
If gate line and power supply line are arranged separately, then electrical performance is improved, but space for arranging thin film transistors is reduced
Solution Approach 1:
The power supply line is moved from a planar arrangement to a three-dimensional arrangement by forming it above the gate line layer using contact holes and upper line layers. This vertical stacking in another dimension (z-axis) allows both lines to coexist without planar interference, maintaining electrical performance while maximizing horizontal space for thin film transistor arrangement.
3Device complexity
If conventional bottom-gate structure is used, then device complexity is reduced, but carrier mobility is limited
Solution Approach 1:
The transistor gate is segmented into two functional parts: the gate electrode at the bottom for electrical control, and the gate line structure above it that provides both electrical connection and thermal management. This segmentation allows the bottom-gate structure to maintain simplicity while the upper gate line structure enables improved carrier mobility through laser annealing.
Solution Approach 2:
The gate insulating film and interlayer insulating film serve as intermediaries between the gate electrode and the gate line. These insulating layers allow the gate line to be positioned above the gate electrode while maintaining electrical isolation, enabling the gate line to provide thermal and electrical functions without interfering with the bottom-gate transistor operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the brightness uniformity, extends the panel's lifespan, and increases the flexibility in arranging thin film transistors by reducing space constraints and improving the aperture ratio.
Implementation Method 1
a gate insulating film formed above the substrate to cover the gate electrode
Implementation Method 2
Laser annealing which uses laser beam for heating has attracted attention as a type of low temperature process. Laser annealing includes locally heating and melting, by irradiating laser beam, non-single crystal semiconductor thin film such as amorphous silicon laminated on an insulating substrate with low heat resistance such as glass, and crystallizing the semiconductor thin film during the cooling process.
Implementation Method 3
crystallizing the semiconductor thin film during the cooling process
Implementation Method 4
an interlayer insulating film formed (i) above the gate insulating film to cover the first electrode and the second electrode
Implementation Method 5
an EL unit; and a thin film semiconductor unit which controls luminescence at the EL unit, in which the EL unit includes: an anode electrode; a cathode electrode; and a light-emitting layer interposed between the anode electrode and the cathode electrode
Data Source
AI summary
A light-emitting panel includes a thin film semiconductor that includes a thin film transistor. The thin film transistor includes a gate electrode, a semiconductor layer above the gate electrode, a gate insulating film between the gate electrode and the semiconductor layer, a first electrode electrically connected to the semiconductor layer, and a second electrode. A first interlayer insulating film is above the thin film semiconductor. A gate line and an auxiliary line are above the first interlayer insulating film and between the first interlayer insulating film and a second interlayer insulating film. The gate line is electrically connected to the gate electrode. An electroluminescence emitter includes two electrodes and a light-emitting layer between the two electrodes. One of the two electrodes is connected to the auxiliary line.