ELD Compensation Circuit for Stable Delta-Sigma Modulators
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Solution Overview
Problem
Continuous-time delta-sigma modulators face performance degradation due to excess loop delay, which existing compensation techniques often address at the expense of complex hardware or limited topology suitability.
Innovation Solution
A circuit with a simple hardware configuration, utilizing a pair of capacitances and four switches, implements an ELD compensation network that includes a derivative stage and sign-reversal circuitry to effectively compensate for excess loop delay in various delta-sigma modulator topologies, avoiding the need for additional DACs and summing amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ELD compensation techniques are used, then modulator stability is improved, but device complexity increases due to additional DACs and summing amplifiers
Solution Approach 1:
The patent combines the ELD compensation function with the existing feedback signal path by injecting the compensation signal at the summing node where feedback is already applied. This merging approach allows ELD compensation to be achieved without adding separate DACs or summing amplifiers, thus improving modulator stability while avoiding increased device complexity
Solution Approach 2:
The invention makes the existing feedback path serve dual purposes: maintaining feedback functionality and providing ELD compensation simultaneously. By utilizing the existing summing node and signal paths for both feedback and compensation, the system achieves multi-functionality without requiring dedicated compensation hardware, resolving the contradiction between reliability improvement and complexity reduction
2Device complexity
If simple hardware arrangements are used, then device complexity is reduced, but adaptability is limited to certain CTDSM topologies
Solution Approach 1:
The patent creates a universal ELD compensation method that can be applied across different CTDSM topologies by injecting the compensation signal at the summing node, which is a common element in various modulator architectures. This approach maintains hardware simplicity while achieving broad adaptability to different topologies including CIFB, NIFB, and other continuous-time delta-sigma modulator configurations
Solution Approach 2:
The invention uses the summing node as an intermediary point where the ELD compensation signal is injected into the existing feedback path. This intermediary approach allows the simple compensation mechanism to interface with various modulator topologies through their common summing node, achieving versatility without complicating the hardware design
Data Source
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AI summary
An excess loop delay (ELD) compensation network (120) for a sigma-delta modulator (10) comprises a derivative circuit (1202) configured to receive a weighed (k0C) replica of the integrated signal (y1(t)) from the input integrator circuit (201) of the modulator and produce therefrom a derivative signal as well as a sign-reversal circuit (1204, 1206a, 1206b, φC, φC(neg)) configured to alternately reverse the sign of the derivative signal over subsequent time intervals of a duration half the sampling period (Ts) of the output quantizer circuit (A/D) of the modulator. A further integrator circuit (1208) is provided to integrate the derivative signal having alternately reversed sign along with an excess loop delay (Z-τ) compensation node (303) configured to inject into the signal propagation path (201, 302, 202, 303) towards the output quantizer circuit (A/D) an excess loop delay (Z-τ) compensation signal comprising the derivative signal after integration at the least one further integrator circuit (1208). Alternative embodiments may contemplate injecting the derivative signal into the signal propagation path towards the quantizer circuit (A/D) before integration of the derivative signal.