Electric Filter with Dual Coils for High-Frequency EMC

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Solution Overview

Problem

Existing electrical filters, such as PI filters, are insufficient in reducing common mode current voltages above 76 MHz to meet EMC standards, particularly in vehicle electrical equipment, as they exceed the 12 dBµV limit when a line impedance stabilization network is used.

Innovation Solution

Modifying the PI filter by adding a second coil between the first and second nodes, with coils having inductance values between 0.1 and 1 µH and being wound in opposite directions to enhance magnetic interaction, thereby reducing common mode current voltages effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a PI filter is used to reduce common-mode current, then common-mode current is reduced at lower frequencies, but the filter is insufficient for frequencies above 76 MHz and cannot meet the 12 dBµV limit

Engineering Contradiction:
ImproveEMC complianceVSAvoidfilter structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The filter is divided into multiple functional sections: a first coil L1 in the first connection, a second coil L2 in the second connection, first and second capacitive assemblies (C1, C2) connected between connections, and a third capacitive assembly (C3) connected to ground. This segmentation allows each component to address specific frequency ranges and current modes, achieving effective common-mode current reduction above 76 MHz while maintaining a manageable structural complexity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the filter structure is modified to improve high-frequency performance, then EMC compliance is achieved, but the filter becomes more complex and costly

Engineering Contradiction:
Improvecommon-mode current reductionVSAvoidfilter implementation
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The filter design achieves multi-functionality by addressing both common-mode and differential-mode currents with a single integrated structure. The first and second coils, along with the capacitive assemblies, work together to reduce common-mode currents above 76 MHz while simultaneously reducing differential-mode currents, eliminating the need for separate filter circuits and simplifying manufacturing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Multiple filter functions are merged into a single compact structure. The first coil L1, second coil L2, first capacitive assembly (C1, C2), and third capacitive assembly (C3) are combined in an integrated configuration that reduces both common-mode and differential-mode currents, achieving EMC compliance without requiring multiple separate filter components.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If standard PI filter configuration is used, then the filter is simple and inexpensive, but it cannot reduce common-mode current voltage below 12 dBµV at frequencies above 76 MHz

Engineering Contradiction:
Improvefilter simplicityVSAvoidparasitic currents
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The filter employs specific parameter values for its components to achieve effective high-frequency suppression. The first coil L1 has inductance between 0.1 and 1 µH, the second coil L2 has inductance between 0.01 and 0.1 µH, and the capacitive assemblies have capacitances selected to create appropriate impedance at frequencies above 76 MHz. These parameter optimizations enable the relatively simple structure to effectively reduce parasitic currents.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The modified filter effectively reduces common mode current voltages to below 12 dBµV at frequencies above 76 MHz, meeting EMC standards while being compact, inexpensive, and easy to implement, and also reduces differential mode currents.

Implementation Method 1

Modifying the PI filter by adding a second coil between the first and second nodes, with coils having inductance values between 0.1 and 1 µH and being wound in opposite directions to enhance magnetic interaction

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentEP3145081B1Electric filter
Publication Date: 2019.11.20 VALEO SYST THERMIQUES SAS
  • EP3145081B1 patent drawingFigure 1~2
  • EP3145081B1 patent drawingFigure 3a~3b
  • EP3145081B1 patent drawingFigure 4a~4b

AI summary

electrical filter (10) adapted to be connected between an electrical voltage source (20) and an electrical device (30), said filter comprising: - a first electrical connection (11) intended to connect a first output terminal (21) of the source (20) to a first electrical supply terminal (31) of the device (30), said first connection comprising a first coil (L1); - a second electrical connection (12) intended to connect a second output terminal (22) of the source (20) to a second electrical supply terminal (32) of the device (30); - a first capacitive assembly (13) connected on the one hand to the first connection (11) between the first coil (L1) and the first electrical supply terminal (31) of the device (30), and connected on the other hand to the second connection (12) by a first node (N1);and - a second capacitive assembly (14) connected on the one hand to the first connection (11) between the first output terminal (21) of the source (20) and the first coil (L1), and connected on the other hand to the second connection (12) by a second node (N2), said first node (N1) being located in the second electrical connection (12) between said second node (N2) and the second electrical supply terminal (32) of the device (30); characterized in that said second connection (12) comprises at least one second coil (L2) located between said first node (N1) and said second node (N2).