Automated Electrical Short Identification in Electronic Designs
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Solution Overview
Problem
Identifying electrical shorts in electronic designs is challenging due to the inefficiency of existing methods, which often require manual determination of shape connectivity and can involve a large number of shapes on the path, making it difficult to locate the exact error.
Innovation Solution
A computer-implemented method that identifies the shortest path between two nets, determines common shapes, and analyzes forks to locate electrical shorts, allowing for automated identification and visualization of the error within an electronic design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual determination of shape connectivity is used to identify electrical shorts, then accuracy in locating errors can be achieved, but the time required and complexity of the process increases significantly
Solution Approach 1:
The patent segments the complex task of electrical short identification into distinct phases: automated shape connectivity determination, shortest path calculation between nets, and systematic fork analysis. This segmentation allows each subtask to be handled by specialized algorithms, improving both speed and accuracy while reducing manual intervention requirements.
Solution Approach 2:
The patent introduces intermediate data structures and algorithms as mediators between the raw design data and the final short identification. Specifically, it uses shortest path algorithms to mediate between net definitions and shape connections, and fork analysis to mediate between shape connectivity and short location, thereby automating the process while maintaining precision.
2Reliability
If all shapes on the path between shorted nets are analyzed, then complete coverage is achieved, but the complexity and computational effort increases due to the large number of shapes
Solution Approach 1:
The patent extracts and focuses analysis on critical elements only - specifically identifying and analyzing forks (connection points where multiple paths converge) rather than examining every shape on the path. This extraction approach maintains complete coverage of potential short locations while dramatically reducing the number of elements requiring detailed analysis.
Solution Approach 2:
The patent performs preliminary actions by pre-calculating shortest paths between nets and pre-identifying all forks on these paths before the actual short analysis begins. This preliminary preparation organizes the data structure to facilitate efficient analysis, reducing the complexity of the main analysis phase while ensuring complete coverage.
3Productivity
If automated methods are used to identify electrical shorts, then productivity increases, but the precision and ability to handle complex connectivity may deteriorate
Solution Approach 1:
The patent incorporates feedback mechanisms where the automated system iteratively refines its analysis based on intermediate results. The fork analysis process uses feedback from shortest path calculations and shape connectivity determination to progressively narrow down potential short locations, ensuring precision is maintained throughout the automated process.
Solution Approach 2:
The patent employs dynamic algorithms that adapt to the specific characteristics of the design being analyzed. The shortest path calculation and fork identification processes dynamically adjust based on the network topology and connectivity patterns, allowing the automated system to maintain high precision across diverse design scenarios while preserving productivity gains.
Data Source
AI summary
The present disclosure relates to a computer-implemented method for electronic design automation. The method may include providing, using one or more computing devices, an electronic design including a first net and a second net. The method may include identifying a shortest path between the first net and the second net and determining at least one common shape associated with the shortest path. The method may also include identifying one or more adjacent shapes to the at least one common shape and identifying at least one fork associated with each of the one or more connectivity reference points. The method may further include analyzing an intermediate fork of the at least one fork to identify an electrical short associated with the electronic design.