Electro Optical Device Frame Narrowing via Edge Potential Supply Line
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Solution Overview
Problem
Existing electro optical devices face challenges in narrowing the frame portion due to the coverage of potential supply lines by planarizing layers during thin film sealing, which increases the frame size and complicates the sealing process.
Innovation Solution
The potential supply line is extended along the edge of the substrate in a second area outside the first area where the insulating film is provided, with the planarizing layer covering and overlapping with at least a part of the supply line, allowing for a reduction in frame size while preventing cracking and peeling of the gas barrier layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the potential supply line is covered with a planarizing layer during thin film sealing, then the sealing integrity is improved, but the frame portion becomes larger
Solution Approach 1:
The potential supply line is extended from the first area (pixel electrode area) to the second area (edge area) of the substrate, utilizing the edge dimension. The planarizing layer is configured to overlap with the extended supply line in the second area, allowing the sealing to cover the supply line without increasing the frame portion area in the pixel electrode area.
2Reliability
If the planarizing layer is extended to cover the potential supply line, then the sealing is improved, but the manufacturing complexity increases
Solution Approach 1:
The planarizing layer serves dual functions: it planarizes the pixel electrode area (first area) and simultaneously seals the potential supply line in the edge area (second area). By extending the planarizing layer to overlap with the supply line in the second area, the sealing function is integrated into the existing planarizing layer rather than requiring a separate sealing structure.
Data Source
AI summary
An electro optical device having a substrate, scanning lines, data lines, and pixel electrodes arranged to correspond to intersections of scanning and data lines, a counter electrode opposite the substrate from a pixel electrode, an emission layer between the pixel electrode and the counter electrode, a driving transistor connected to the pixel electrode, a driving circuit for supplying a signal to at least one of the scanning lines and data lines, a potential supply line for the driving circuit, an insulating film between the driving transistor and the counter electrode, the insulating film in a first area on the substrate, and a planarizing layer covering the counter electrode, wherein the potential supply line extends along an edge of the substrate in a second area, and the planarizing layer covers the insulating film and overlaps with at least a part of the potential supply line in the second area.