Electro-Optical Device Layout Preventing Gate Insulator Etch Damage
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Solution Overview
Problem
The existing electro-optical devices face the risk of gate insulating film damage during etching due to the light shielding layer overlapping the gate insulating film, which can lead to operational failures and display defects.
Innovation Solution
The electro-optical device design includes a second light shielding film positioned to overlap the semiconductor layer but not the gate electrode, preventing direct overlap with the gate insulating film, thus reducing the risk of damage during etching and maintaining transistor stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the light shielding layer is positioned to overlap the gate insulating film in plan view, then light shielding effectiveness is improved, but the gate insulating film may be destroyed by etching during contact hole formation
Solution Approach 1:
The patent positions the second light shielding film in a different planar location relative to the gate electrode, specifically overlapping the semiconductor layer but not the gate electrode in plan view. This spatial reconfiguration in the planar dimension maintains light shielding functionality while eliminating the harmful overlap with the gate insulating film that causes etching damage.
Solution Approach 2:
The patent applies light shielding films with different spatial characteristics: the first light shielding film is positioned at the gate electrode location for local light shielding, while the second light shielding film is positioned at the semiconductor layer location. This local differentiation allows each film to serve its specific function without causing harm to other components.
2Object-affected harmful factors
If the light shielding layer is positioned to overlap the gate insulating film, then light shielding performance is improved, but manufacturing precision is compromised due to etching damage risk
Solution Approach 1:
The patent repositions the second light shielding film in the planar dimension to overlap the semiconductor layer rather than the gate insulating film. This dimensional adjustment maintains light shielding performance while eliminating the need for high-precision etching alignment that would be required to avoid damaging the gate insulating film.
Solution Approach 2:
The patent extracts the harmful function (potential etching damage) from the light shielding system by separating the second light shielding film's position from the gate insulating film area. This allows the light shielding function to be maintained through the first light shielding film while eliminating the manufacturing precision constraint.
3Object-affected harmful factors
If the light shielding layer overlaps the gate insulating film, then light blocking capability is improved, but device complexity increases due to additional protective structures needed
Solution Approach 1:
The patent implements light shielding with local quality by positioning the first light shielding film at the gate electrode location and the second light shielding film at the semiconductor layer location. Each film provides targeted light blocking where needed, eliminating the need for complex protective structures that would be required if a single overlapping light shielding layer caused etching damage.
Solution Approach 2:
The patent uses planar position differentiation to achieve light blocking capability without increasing structural complexity. By positioning the second light shielding film to overlap the semiconductor layer rather than the gate insulating film, the design maintains simple fabrication processes while achieving effective light blocking through strategic spatial arrangement.
Data Source
AI summary
An electro-optical device includes a substrate, a transistor including a semiconductor layer, a gate insulating film, and a gate electrode that are aligned in a direction away from the substrate, a first insulating layer covering the transistor, a first contact provided at the first insulating layer and coupled to the gate electrode, a first light shielding film provided at the first insulating layer, and a second light shielding film provided between the substrate and the semiconductor layer, in which the second light shielding film overlaps the semiconductor layer when viewed in a normal direction of the substrate and is provided at a different position from the gate electrode.