Electro-optical Device Holding Capacitor Light Shielding Layer

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Solution Overview

Problem

Active drive type liquid crystal devices face instability due to optical leakage current when intense light is incident on the semiconductor layer of the thin film transistor, leading to complex wiring and light shielding structures that compromise display performance.

Innovation Solution

An electro-optical device with a holding capacitor and a light shielding layer is implemented between the substrate and the transistor, featuring conductive layers and a light shielding layer that overlap each other to block light and ensure electrical capacitance, while the holding capacitor includes two capacitance elements electrically coupled in parallel to stabilize the display.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a light shielding structure is introduced to block light incident on the semiconductor layer, then optical leakage current is suppressed, but the wiring structure becomes more complex

Engineering Contradiction:
Improvedisplay operation stabilityVSAvoidwiring structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the light shielding function and capacitance element function into a single integrated structure. The light shielding layer serves dual purposes: blocking light from reaching the semiconductor layer and acting as one of the capacitance electrodes. This merging eliminates the need for separate capacitance wiring structures, thereby suppressing optical leakage current while avoiding increased wiring complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The light shielding layer is designed to perform multiple functions simultaneously: it acts as a light shielding barrier, a capacitance electrode, and a wiring conductor. By making the light shielding layer universal, the patent eliminates the need for additional dedicated capacitance wiring structures, thus maintaining operational stability without increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If the capacitance element is disposed to cover the convex portion, then electrical capacitance is ensured, but the contact hole depth and wiring complexity increase

Engineering Contradiction:
Improveelectrical capacitanceVSAvoidcontact hole and wiring structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the capacitance element with the light shielding layer structure. The light shielding layer itself forms part of the capacitance element, eliminating the need for separate capacitance wiring and deep contact holes. This integration ensures adequate electrical capacitance while avoiding increased wiring and contact hole complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the capacitance function from the traditional separate capacitance wiring structure and integrates it directly into the light shielding layer. By taking out the need for complex capacitance wiring and deep contact holes, the invention simplifies the overall structure while maintaining the necessary electrical capacitance for stable display operation.

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If the light shielding layer and capacitance element are integrated, then device complexity is reduced, but light shielding effectiveness may be compromised

Engineering Contradiction:
Improvewiring structure simplicityVSAvoidlight incident on semiconductor layer
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent combines the light shielding layer and capacitance element into a single integrated structure without compromising light shielding effectiveness. The light shielding layer maintains its light-blocking properties while simultaneously serving as a capacitance electrode, ensuring both operational stability and adequate electrical capacitance without increasing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies local quality by ensuring the light shielding layer has appropriate light-blocking properties in the regions where it contacts the semiconductor layer, while maintaining its capacitance function in other regions. This localized optimization ensures effective light shielding where needed without sacrificing the electrical capacitance functionality of the integrated structure.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances light shielding properties, suppresses optical leakage currents, and maintains stable display operation even with high-intensity light, ensuring improved electrical capacitance and display quality.

Implementation Method 1

a light shielding layer between the substrate and the transistor... enhances light shielding properties, suppresses optical leakage currents

Methodology Applied
Scientific EffectLight blocking: Absorption (EM radiation)

Implementation Method 2

a holding capacitor between the substrate and the light shielding layer... ensures improved electrical capacitance and display quality

Methodology Applied
Scientific EffectElectrical capacitance: Capacitance

Data Source

PatentUS11081588B2Electro-optical device and electronic apparatus
Publication Date: 2021.08.03 SEIKO EPSON CORP
  • US11081588B2 patent drawing
  • US11081588B2 patent drawing
  • US11081588B2 patent drawing

AI summary

An electro-optical device includes a base material as a substrate, a TFT as a transistor, a scanning line as a light shielding layer between the base material and the TFT, and a holding capacitor between the base material and the scanning line. The holding capacitor includes a first conductive layer, a second conductive layer provided on the first conductive layer via a first capacitor insulating layer, a third conductive layer electrically connected to the second conductive layer via a first contact hole provided in an insulating layer covering the second conductive layer, and a fourth conductive layer provided on the third conductive layer via a second capacitor insulating layer.