Electro-Optical Memory Package With 3D Stacking and Optical Windows
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Solution Overview
Problem
Existing integrated circuits, particularly those for artificial intelligence and machine learning, face challenges in scaling data movement between processor ICs and memory ICs due to inadequate advancements in data transfer components, which cannot keep pace with the increasing demand for faster and more efficient data processing.
Innovation Solution
The implementation of electro-photonic circuit packages with stacked memory resources on top of electronic integrated circuit (EIC) dies, enabling direct access and communication through optical regions or edge couplings, utilizing electro-photonic transceivers for efficient data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data transfer is performed using traditional electrical connections between processor ICs and memory ICs, then the system can maintain simple architecture, but data transfer speed and efficiency cannot keep pace with increasing processing demands
Solution Approach 1:
The circuit package is segmented into distinct functional layers: processor ICs in a first array, memory ICs in a second array, and electro-optical converter ICs positioned between them. This segmentation allows specialized components to handle specific tasks (electrical-to-optical conversion) while maintaining overall system organization and manageability despite the increased complexity.
Solution Approach 2:
Electro-optical converter ICs serve as intermediary components between processor ICs and memory ICs. These converter ICs receive electrical signals from processors, convert them to optical signals for high-speed transmission, and convert incoming optical signals back to electrical form for memory access. This intermediary approach enables faster data transfer while keeping the architecture modular and manageable.
2Speed
If memory ICs are positioned farther from processor ICs to accommodate optical conversion components, then electro-optical conversion can be implemented, but connection length and signal transmission distance increase
Solution Approach 1:
The patent transitions from traditional two-dimensional planar layouts to a three-dimensional stacked architecture. Processor ICs, converter ICs, and memory ICs are arranged in vertical layers with multiple interconnection levels. This dimensional change allows optical signals to travel shorter distances through vertical pathways while accommodating the necessary electro-optical conversion components in between layers, thus achieving high-speed transfer without excessive connection lengths.
3Productivity
If traditional electrical connections are used between all components, then the system architecture remains simple, but data movement capacity cannot scale with processing demands
Solution Approach 1:
The patent replaces traditional electrical signal transmission with optical signal transmission for data movement between processor ICs and memory ICs. Optical interconnects provide higher bandwidth and faster data transfer rates compared to electrical connections. The electro-optical converter ICs enable this substitution by converting electrical signals to optical signals for transmission and back to electrical signals at the destination, thus scaling data movement capacity while maintaining architectural manageability through modular conversion points.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances data access and transfer efficiency within limited space constraints, allowing for more immediate and direct interaction between EIC dies and memory stacks, facilitating higher data throughput and denser packaging.
Implementation Method 1
an optical portion configured to transform the electrical instructions to an optical signal when transmitting
Implementation Method 2
transform incoming optical signals to electrical instructions when receiving
Data Source
AI summary
The present disclosure relates to packaging techniques in connection with packaging electrical and optical components within circuit packages. For example, one or more examples described herein involve producing or manufacturing memory circuit packages having memory stacks positioned on top of electronic integrated (EIC) dies positioned over one or more PIC wafers. Techniques described herein also relate to forming overmolded memory circuit packages having optical interfaces which are optically accessible via optical window(s).


