Semiconductor Electrode Bumps for Ultrasonic Bonding Damage Reduction

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Solution Overview

Problem

The existing bonding process for semiconductor chips in Bump On Film (BOF) packages often causes damage to the electrodes due to ultrasonic vibrations during the bonding of the semiconductor chip and conductor wirings via bumps.

Innovation Solution

The solution involves forming electrode bumps on the semiconductor chip that are harder than the wiring bumps, allowing the electrodes to connect with the conductor wirings through these bumps, which distributes the ultrasonic vibrations and reduces the load on the electrodes, thereby minimizing damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ultrasonic vibrations are applied during bonding of semiconductor chip and conductor wirings via bumps, then bonding connection is achieved, but damage occurs to the electrodes of the semiconductor chip

Engineering Contradiction:
Improvebonding connectionVSAvoidelectrode damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a specific bump structure as an intermediary element between the semiconductor chip electrodes and conductor wirings. The bump has a softer material layer (such as solder) that acts as a mediator to absorb ultrasonic vibrations during bonding, preventing direct transmission of harmful vibrations to the electrodes while still achieving reliable electrical and mechanical connection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the material parameters of the bump structure by using a composite material system with different hardness levels. The bump includes a softer material layer (lower hardness) specifically designed to alter the vibration absorption characteristics during bonding, thereby reducing electrode damage while maintaining bonding effectiveness.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If bumps are formed on conductor wirings to connect semiconductor chip electrodes, then electrical connection is achieved, but the bonding process causes damage to electrodes due to concentrated stress

Engineering Contradiction:
Improveelectrical connectionVSAvoidelectrode strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent modifies the material parameters of the bump structure by incorporating a softer material layer with specific hardness characteristics. This parameter change allows the bump to deform preferentially during bonding, distributing stress away from the electrode and preventing damage while maintaining electrical connection integrity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite material structure for the bumps, combining materials with different mechanical properties. The composite structure includes a softer layer that provides stress distribution and protection to the electrode, while maintaining overall structural integrity and electrical conductivity for reliable connection.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces damage to the semiconductor chip electrodes by distributing the bonding stress and ensuring reliable connections, even under thermal expansion or contraction of the tape carrier substrate.

Implementation Method 1

damage to the electrodes due to ultrasonic vibrations during the bonding of the semiconductor chip and conductor wirings via bumps

Methodology Applied
Scientific EffectUltrasonic vibrations: Ultrasonic Vibration

Data Source

PatentUS7772697B2Semiconductor device and method for producing the same
Publication Date: 2010.08.10 PANASONIC SEMICON SOLUTIONS CO LTD
  • US7772697B2 patent drawing
  • US7772697B2 patent drawing
  • US7772697B2 patent drawing

AI summary

A semiconductor device includes a tape carrier substrate having a flexible insulating film base, a plurality of conductor wirings provided on the film base, and wiring bumps respectively formed so as to cover an upper surface and both side surfaces of the conductor wirings, and a semiconductor chip mounted on the tape carrier substrate, wherein electrodes of the semiconductor chip are connected to the conductor wirings via the wiring bumps. Electrode bumps are formed on the electrodes of the semiconductor chip, the electrodes of the semiconductor chip are connected to the conductor wirings via a bonding between the wiring bumps and the electrode bumps, and the electrode bumps are harder than the wiring bumps. This structure can reduce bonding damages to the electrodes of the semiconductor chip caused by a process of connecting the electrodes and the conductor wirings via the bumps.