Electrode Layer Segmentation for Uniform Memory String Resistance
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Solution Overview
Problem
Existing semiconductor devices face issues with increased resistance differences in electrode layers, leading to performance delays and operational inefficiencies due to varying charging and discharging times across memory strings.
Innovation Solution
The semiconductor device incorporates a stacked body with insulating layers and staircase portions that maintain electrical insulation and connection integrity of electrode layers, reducing resistance differences by ensuring consistent charging and discharging times across memory strings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two SGDs are juxtaposed in one block to increase memory capacity, then the memory device can store more data, but the resistance difference of the electrode layer increases between memory strings
Solution Approach 1:
The patent divides the block into multiple regions using insulating layers that extend in the first direction, creating separate regions for different memory strings. This segmentation isolates the electrode layers of different memory strings, preventing resistance coupling and ensuring uniform resistance characteristics across all memory strings while maintaining high memory capacity through the dual SGD configuration.
Solution Approach 2:
The patent introduces insulating layers with specific properties (extending in the first direction, positioned between electrode layers) at specific locations within the block. These locally placed insulating structures create different electrical environments for different memory strings, ensuring that each memory string has consistent resistance characteristics while allowing the overall block to maintain high capacity through multiple SGDs.
2Reliability
If insulating layers extend throughout the stacked body to prevent resistance increase, then the resistance difference is reduced, but the device complexity increases
Solution Approach 1:
The insulating layers serve multiple functions simultaneously: they provide electrical insulation between electrode layers, divide the block into regions for different memory strings, and extend in the first direction to ensure uniform resistance characteristics. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity while achieving resistance uniformity.
Solution Approach 2:
The insulating layers extend in the first direction (perpendicular to the stacking direction), introducing a new dimensional approach to solving the resistance problem. Instead of adding more layers in the stacking direction, the patent uses lateral extension in the first direction to achieve electrical isolation and resistance uniformity, thereby avoiding increased complexity in the vertical stacking arrangement.
Data Source
AI summary
A semiconductor device of the embodiment includes a stacked body, a first insulating layer, first and second staircase portions 2, and a second insulating layer 46. The stacked body includes a first electrode layer 41 (WLDD) and a second electrode layer 41 (SGD). The first and second staircase portions 2 are provided in a first end portion 101 a second end region 102. The second insulating layer 46 extends in the X-direction. The second insulating layer divides the second electrode layer 41 (SGD) in the X-direction direction. A length L1 in the X-direction of the second insulating layer 46 is longer than a length L2 in the x-direction of the second electrode layer 41 (SGD) and shorter than a length L3 in the X-direction of the first electrode layer 41 (WLDD).