Electrode Lead-out Structure Sealing via Nested Overlap
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Solution Overview
Problem
The stability and reliability of metal oxide semiconductor thin-film transistors (TFTs) in display devices are compromised due to water and oxygen permeation through vias in the electrode lead-out structures, leading to signal delay and poor display performance, especially in large-size and high-resolution panels.
Innovation Solution
An overlapped electrode lead-out structure is implemented, where the lead-out electrode covers the wall and bottom of the via and extends along the isolating layer to overlap with the upper surface, effectively sealing the structure and preventing water and oxygen ingress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vias are formed in the isolating layer to allow lead-out electrode contact with metal oxide semiconductor, then electrical connection is achieved, but water and oxygen permeate through vias causing stability degradation
Solution Approach 1:
The lead-out electrode is nested within the via structure, extending from the bottom to the top surface and overlapping with the isolating layer. This nested configuration creates a sealed structure where the electrode material fills and covers the via opening, preventing water and oxygen from penetrating through the via into the metal oxide semiconductor layer while maintaining electrical connection.
Solution Approach 2:
The lead-out electrode extends in multiple dimensions: vertically through the via from bottom to top, and horizontally by overlapping with the isolating layer surface. This multi-dimensional extension transforms a simple via contact into a sealed structure that blocks harmful substance permeation paths while maintaining electrical functionality.
2Device complexity
If lead-out electrode is merely led out from substrate electrode to insulating layer surface, then simple structure is maintained, but exposed hole walls allow water and oxygen ingress
Solution Approach 1:
The lead-out electrode is nested within the via structure, extending from the bottom to the top surface and overlapping with the isolating layer. This nested configuration creates a sealed structure where the electrode material fills and covers the via opening, preventing water and oxygen from penetrating through the via into the metal oxide semiconductor layer while maintaining electrical connection.
Solution Approach 2:
The lead-out electrode extends in multiple dimensions: vertically through the via from bottom to top, and horizontally by overlapping with the isolating layer surface. This multi-dimensional extension transforms a simple via contact into a sealed structure that blocks harmful substance permeation paths while maintaining electrical functionality.
3Productivity
If conventional electrode lead-out structure is used, then manufacturing process is simple, but signal delay occurs in large-size high-resolution panels
Solution Approach 1:
The lead-out electrode is nested within the via structure, extending from the bottom to the top surface and overlapping with the isolating layer. This nested configuration creates a sealed structure where the electrode material fills and covers the via opening, preventing water and oxygen from penetrating through the via into the metal oxide semiconductor layer while maintaining electrical connection.
Solution Approach 2:
The lead-out electrode extends in multiple dimensions: vertically through the via from bottom to top, and horizontally by overlapping with the isolating layer surface. This multi-dimensional extension transforms a simple via contact into a sealed structure that blocks harmful substance permeation paths while maintaining electrical functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the stability and reliability of metal oxide semiconductor TFTs by reducing the concentration gradient of water and oxygen, resulting in improved performance and display quality for large-size and high-resolution liquid crystal display devices and AM-OLED displays.
Implementation Method 1
the lead-out electrode covers the wall and bottom of the via of the isolating layer... effectively sealing the structure and preventing water and oxygen ingress
Implementation Method 2
This solution enhances the stability and reliability of metal oxide semiconductor TFTs by reducing the concentration gradient of water and oxygen
Data Source
AI summary
The present invention belongs to the field of display technology and particularly relates to an electrode lead-out structure, an array substrate and a display device. The electrode lead-out structure comprises a substrate electrode, an isolating layer and an lead-out electrode. The isolating layer covers the substrate electrode to expose a part of region of the substrate electrode through a via formed in the isolating layer, and the lead-out electrode is in contact with the exposed region of the substrate electrode, wherein the lead-out electrode covers the wall and bottom of the via of the isolating layer and extends from an upper edge of the via of the isolating layer along an upper surface of the isolating layer to overlap with the upper layer of the isolating layer.