Display Panel Electrode Overlap Layout for TFT Stability
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Solution Overview
Problem
Current liquid crystal display devices face performance stability issues due to the adverse effects of data lines on thin film transistors, which deteriorate the display effect.
Innovation Solution
A display panel design featuring a staggered arrangement of semiconductors and data lines, where at least part of the semiconductor overlaps with the pixel electrode, reducing the influence of data lines on thin film transistors and improving stability and display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If data lines are disposed adjacent to thin film transistors for compact layout, then device integration is improved, but performance stability of thin film transistors deteriorates due to electric field interference
Solution Approach 1:
The patent applies dimensionality change by arranging the semiconductor layer and data lines in different spatial layers (stacked configuration) rather than adjacent planar positions. The semiconductor is positioned in a first layer while data lines are in a second layer, utilizing the vertical dimension to resolve the conflict between compact layout and electric field interference. This layered arrangement maintains high integration while reducing harmful electromagnetic coupling between adjacent components.
2Measurement precision
If pixel density is increased to improve resolution, then display quality is improved, but the adverse effect of data lines on thin film transistors becomes more significant
Solution Approach 1:
The patent resolves this contradiction by transitioning from a planar arrangement to a three-dimensional stacked configuration. By positioning the semiconductor vertically above or below the data lines rather than adjacent to them in the same plane, the design enables higher pixel density while maintaining adequate spacing to minimize electric field interference. This vertical stacking allows closer horizontal positioning of pixels without increasing the adverse interaction between data lines and transistors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The staggered arrangement enhances the working stability of thin film transistors and improves the display quality by minimizing the impact of data lines, leading to increased pixel density and resolution without altering process conditions.
Implementation Method 1
The data lines will generate an electric field when it is energized. The electric field will affect semiconductors in the thin film transistors
Data Source
AI summary
A display panel includes a first data line, a second data line, a third data line, a first sub-pixel, a second sub-pixel, a third sub-pixel, and a first transistor. The first sub-pixel is located between the first data line and the second data line, and includes a first pixel electrode. The second sub-pixel is located between the second data line and the third data line, and includes a second pixel electrode. The third sub-pixel is located between the first data line and the second data line, and includes a third pixel electrode. The first transistor is electrically connected to one of the first pixel electrode, the second pixel electrode, and the third pixel electrode. The first transistor includes a first semiconductor. At least a part of the first semiconductor overlaps with the first pixel electrode or the second pixel electrode.