Electroless Gold Metallization for Low Roughness Semiconductor Interconnects
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Solution Overview
Problem
Current methods for creating solderable and sinterable surfaces in semiconductor devices face challenges such as oxidation, sulfidization, contamination susceptibility, and high surface roughness, particularly with silver and gold layers, which affect reliability and process efficiency.
Innovation Solution
A method involving physical vapor deposition of a metallization layer stack, followed by wet-chemical etching and electroless immersion deposition of a noble metal layer, such as gold, to create a patterned structure without the need for lithography, ensuring low surface roughness and corrosion resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silver or gold layers are deposited to create solderable and sinterable surfaces, then electrical connectivity and corrosion resistance are improved, but surface roughness increases and susceptibility to oxidation and sulfidization occurs
Solution Approach 1:
The metallization structure is segmented into multiple functional layers: a base metallization layer (Cu, Al, or alloy) providing electrical conductivity, and a separate noble metal layer (Ag or Au) deposited by electroless plating to provide corrosion resistance and solderability. This segmentation allows each layer to optimize its specific function without compromising the other.
Solution Approach 2:
The invention uses composite metallization structures combining different materials with complementary properties. The base layer provides electrical conductivity while the electroless noble metal coating provides corrosion resistance and low surface roughness, creating a composite structure that achieves both electrical performance and surface quality requirements.
2Manufacturing precision
If conventional deposition and lithography methods are used to pattern metallization layers, then precise patterning is achieved, but processing complexity and number of steps increase
Solution Approach 1:
The electroless deposition process is self-patterning, automatically forming metallization only on conductive surfaces through chemical reduction of metal ions. This self-service mechanism eliminates the need for external lithography tools, masks, and alignment systems, significantly simplifying the processing steps while maintaining patterning precision.
Solution Approach 2:
The invention replaces mechanical lithography systems (photolithography equipment, mask alignment systems) with a chemical deposition process. The electroless plating chemistry selectively deposits metal based on electrical conductivity, substituting complex mechanical and optical systems with a simpler chemical field-based approach.
3Manufacturing precision
If additional patterning steps are added to achieve precise metal stack patterns, then patterning precision is improved, but processing time and productivity decrease
Solution Approach 1:
The electroless deposition process continuously deposits metallization on exposed conductive surfaces without interruption for lithography, alignment, or mask changes. This continuous useful action maintains high processing speed while achieving precise patterning through the inherent selectivity of the chemical deposition process.
Solution Approach 2:
The invention merges the patterning function and metallization deposition function into a single integrated process step. The electroless deposition simultaneously patterns and deposits the metal layer, combining what would traditionally require separate lithography and deposition steps into one unified operation, thereby improving productivity without sacrificing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in uniform, low-roughness, corrosion-resistant surfaces that enhance the reliability of semiconductor connections and reduce processing complexity, enabling efficient patterning and encapsulation of metal stacks without additional patterning steps.
Implementation Method 1
depositing a second metallization layer over the patterned first metallization layer, wherein depositing the second metallization layer includes an electroless deposition process including immersing the patterned first metallization layer in a metal electrolyte
Implementation Method 2
depositing a metallization layer stack including at least two metallization layers over a semiconductor workpiece by means of physical vapor deposition
Data Source
AI summary
A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization layer over a semiconductor workpiece; patterning the first metallization layer; and depositing a second metallization layer over the patterned first metallization layer, wherein depositing the second metallization layer includes an electroless deposition process including immersing the patterned first metallization layer in a metal electrolyte.