Electroless Thin Pad First Level Interconnects for Lithographically Defined Vias
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Solution Overview
Problem
Conventional IC package architectures require thick FLI pads to prevent tin diffusion during solder reflow, leading to increased package dimensions and reliability issues due to the small contact area of exposed vias, which complicates the formation of robust solder joints.
Innovation Solution
The development of thin-profile FLI bond pads with a barrier layer to prevent tin diffusion, formed by electroless metal deposition of multiple metal layers directly onto the via top and adjacent dielectric matrix, allowing for a thickness of less than five microns while maintaining structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick FLI pads are used to prevent tin diffusion during solder reflow, then reliability is improved, but package thickness increases
Solution Approach 1:
The FLI pad structure is segmented into multiple functional layers: a barrier layer (e.g., nickel or palladium) to prevent tin diffusion, an intermediate layer (e.g., copper) for electrical conductivity, and a solderable outer layer. This segmentation allows each layer to perform its specific function, preventing tin diffusion while maintaining a thin overall profile.
Solution Approach 2:
The FLI pad uses composite material structures combining different metals with complementary properties. The barrier layer materials (nickel, palladium) provide tin diffusion resistance, while copper layers provide electrical conductivity, and outer layers provide solderability. This composite approach achieves reliability without increasing thickness.
2Reliability
If the contact area of exposed vias is increased to form robust solder joints, then reliability is improved, but device footprint increases
Solution Approach 1:
The invention applies different material properties to different parts of the via structure. The barrier layer is applied locally at the via interface where tin diffusion occurs, while the upper FLI pad surface provides the solderable contact area. This local differentiation allows robust solder joints without increasing overall footprint.
Solution Approach 2:
Instead of increasing the horizontal contact area to improve solder joint robustness, the invention moves to the vertical dimension by creating multi-layer FLI pad structures. The barrier layer, intermediate layer, and outer layer are stacked vertically, providing robust solder joints through enhanced material properties rather than increased surface area.
3Length of stationary object
If multiple metal layers are deposited by electroless deposition to create thin-profile FLI pads, then package thickness is reduced, but manufacturing complexity increases
Solution Approach 1:
The electroless deposition process is self-catalytic and self-limiting. The barrier layer materials (nickel, palladium) naturally catalyze the deposition of subsequent copper layers, and the process automatically stops when the desired thickness is achieved or when the catalyst is consumed. This self-service characteristic simplifies process control despite the multi-layer complexity.
Solution Approach 2:
The manufacturing process controls layer thickness and composition by adjusting deposition parameters such as bath composition, temperature, deposition time, and catalyst concentration. By changing these parameters, the process can produce consistent thin-profile multi-layer structures without requiring complex real-time monitoring or adjustment mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The thin-profile FLI bond pads effectively mitigate tin diffusion and enable the formation of robust solder joints, reducing package thickness and improving reliability by accommodating various via geometries and current densities.
Implementation Method 1
formed by electroless metal deposition of multiple metal layers directly onto the via top and adjacent dielectric matrix
Implementation Method 2
a barrier layer to prevent tin diffusion
Data Source
AI summary
A package substrate, comprising a package comprising a substrate, the substrate comprising a dielectric layer, a via extending to a top surface of the dielectric layer; and a bond pad stack having a central axis and extending laterally from the via over the first layer. The bond pad stack is structurally integral with the via, wherein the bond pad stack comprises a first layer comprising a first metal disposed on the top of the via and extends laterally from the top of the via over the top surface of the dielectric layer adjacent to the via. The first layer is bonded to the top of the via and the dielectric layer, and a second layer is disposed over the first layer. A third layer is disposed over the second layer. The second layer comprises a second metal and the third layer comprises a third metal. The second layer and the third layer are electrically coupled to the via.