Electromigration Check Using Compiled Rules Library

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Solution Overview

Problem

Current electromigration design rule checking tools consume significant memory resources and slow down evaluation due to the generation and utilization of in-memory condition trees and expression trees, which are necessary for identifying conformance to electromigration design rules in integrated circuits.

Innovation Solution

A computing system that generates a compiled rules library by parsing electromigration design rules, translating them into an intermediate format, expanding macro instructions, and compiling the source code into machine code for runtime execution, allowing for efficient electromigration design rule checks on integrated circuit layouts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If in-memory condition trees and expression trees are generated and utilized for electromigration design rule checking, then the layout design conformance evaluation can be performed, but memory resources are consumed and evaluation speed is slowed

Engineering Contradiction:
Improvelayout design conformance evaluationVSAvoidmemory resources
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the electromigration design rules from the input file and compiles them into a separate rules library file, separating the rule definition from the checking process. This extraction eliminates the need to generate and store large in-memory condition trees and expression trees during layout conformance evaluation, thereby reducing memory consumption while maintaining evaluation capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary compilation of electromigration design rules into a rules library file before the actual layout conformance evaluation. The rules are parsed, validated, and stored in an optimized format in advance, so that during the checking phase, the system can directly reference the pre-compiled rules without generating intermediate data structures, thus improving both memory efficiency and evaluation speed

Inventive Principle:
Principle #10Preliminary action

2Reliability

If in-memory condition trees and expression trees are generated and utilized for electromigration design rule checking, then the layout design conformance evaluation can be performed, but the evaluation process is slowed down

Engineering Contradiction:
Improvelayout design conformance evaluationVSAvoidevaluation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts and pre-compiles electromigration design rules into a rules library file, removing the need to generate and traverse in-memory condition trees and expression trees during layout evaluation. This extraction of rule processing from the evaluation path significantly accelerates the conformance checking speed while maintaining accurate evaluation

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary compilation of electromigration design rules into an optimized rules library format before the actual layout conformance evaluation. By pre-processing and storing rules in a compact, directly usable format, the system eliminates the time-consuming generation and traversal of intermediate data structures during evaluation, thereby improving productivity

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10229240B2Electromigration check in layout design using compiled rules library
Publication Date: 2019.03.12 SIEMENS INDUSTRY SOFTWARE INC
  • US10229240B2 patent drawing
  • US10229240B2 patent drawing
  • US10229240B2 patent drawing

AI summary

This application discloses a computing system to receive electromigration design rules defining characteristics of integrated circuits configured to cause electromigration, generate a rules library including machine code implementing electromigration design rule checks for the characteristics defined by the electromigration design rules, and perform the electromigration design rule checks on a layout design of an integrated circuit by executing the machine code implementing the electromigration design rule checks on structures of the integrated circuit described in the layout design. The computing system can generate the rules library at runtime by parsing the electromigration design rules to identify the characteristics of integrated circuits configured to cause electromigration, translating the electromigration design rules into an intermediate format based on the identified characteristics of integrated circuits, expanding macro instructions in the intermediate file into the source code, and compiling the source code into machine code for population into the rules library.