Localized Electron Beam Etching for Integrated Circuit Diagnosis
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Solution Overview
Problem
Current methods for analyzing manufacturing defects in integrated circuit (IC) devices are limited by the inability to perform selective and localized chemical etching, especially when failures are not surface-visible, and lack real-time imaging and material analysis capabilities, which hampers accurate diagnosis and repair.
Innovation Solution
The method employs localized electron beam-assisted chemical etching using halogen-containing compounds in a vacuum chamber, allowing for selective etching and deposition of materials, enabling real-time imaging and analysis of IC surfaces, and the use of electron beams to form radicals that selectively remove layers and deposit dielectric materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching methods are used, then material removal can be achieved, but selective and localized etching is not possible
Solution Approach 1:
The patent applies local quality by making the etching process selective to specific locations and materials. The etching solution is designed to selectively remove certain dielectric layers while leaving others intact, and the process can be applied to specific regions of the IC device rather than uniformly across the entire surface. This enables precise diagnosis by exposing only the relevant failure areas.
Solution Approach 2:
The patent uses an intermediary approach by introducing a controlled chemical environment (etching solution in a sealed chamber) that mediates between the etching agent and the IC device. The sealed chamber allows for controlled exposure of the etching solution to specific areas of the device, enabling localized etching while protecting other areas. This intermediary system provides the selectivity and control needed for precise failure analysis.
2Difficulty of detecting and measuring
If the entire IC device is etched to expose failure sites, then defects can be observed, but the device structure is destroyed and repair is not possible
Solution Approach 1:
The etching process is applied locally to specific regions of the IC device rather than uniformly across the entire device. This localized approach allows failure sites to be exposed for observation while preserving the overall device structure and other functional areas, making the device potentially repairable or suitable for further analysis.
Solution Approach 2:
The patent applies partial etching action by removing only the necessary amount of material to expose the failure site, rather than completely stripping all layers. This controlled partial removal is sufficient for diagnosis while maintaining enough of the device structure to allow for potential repair or further investigation.
3Manufacturing precision
If small holes are etched for localized analysis, then precise diagnosis is possible, but liquid etch materials cause wetting and bubble formation problems
Solution Approach 1:
The patent replaces liquid etch materials with a gaseous etching environment. The etching solution is delivered as a vapor or gas in a sealed chamber, which eliminates the wetting and bubble formation problems associated with liquid etchants. The gaseous environment can uniformly and cleanly etch small areas without the harmful effects of liquid material accumulation.
Solution Approach 2:
The patent uses a sealed chamber environment that creates a controlled, inert atmosphere for the etching process. This controlled environment prevents unwanted chemical reactions, eliminates liquid wetting issues, and allows for clean, precise etching of small areas. The inert or controlled atmosphere ensures that the etching proceeds without contamination or bubble formation.
4Ease of manufacture
If timed etches are used, then the process is simple, but etch depth variability is high due to assumed or estimated etch rates
Solution Approach 1:
The patent implements feedback control by monitoring the etching process in real-time and using this information to control the etch depth. Sensors detect when the etching has reached the desired depth or when a specific layer has been exposed, and this feedback information is used to stop or adjust the etching process. This eliminates the need for assumed or estimated etch rates and provides precise depth control.
Solution Approach 2:
The patent uses preliminary action by first imaging the IC device to identify the exact location and depth of the failure site before initiating the etching process. This preliminary imaging step provides information about what needs to be etched and to what depth, allowing the etching parameters to be pre-configured for optimal precision. The process is then guided by this preliminary information throughout the etching operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise diagnosis and potential repair of IC failures by allowing selective etching and deposition, providing both spatial and chemical information as layers are removed, improving the accuracy of defect analysis and device reliability.
Implementation Method 1
employing an electron beam to form chemical radicals
Implementation Method 2
exciting the layer of reactive material with the electron beam to form chemical radicals
Implementation Method 3
the chemical radicals selectively etch the surface of the IC
Implementation Method 4
positioning the IC in a vacuum chamber
Data Source
AI summary
A method provides a mechanism to examine physical properties and/or diagnose problems at a selected location of an integrated circuit. Such a method can include creating a layer of a reactive material a selected distance above and in proximity with a surface of the integrated circuit so that the reactive material can be evaluated to form chemical radicals above and in proximity to the surface of the integrated circuit. A portion of the reactive material can be excited. A portion of the surface of the integrated circuit can be removed to a selected level to evaluate an exposed electrical structure of the integrated circuit. The exposed electrical structure can be evaluated to determine a potential problem in the integrated circuit.