Electronic Apparatus Access-Point Switching by Processor Clock Mode

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Solution Overview

Problem

Existing wireless LAN systems struggle to appropriately change connection destinations based on processor clock frequency modes, leading to potential disruptions during critical operations like printing or setting configurations.

Innovation Solution

An electronic apparatus is configured to receive a change request for the connection destination access point, with processing controlled based on the processor's clock frequency mode, ensuring that changes are only made when the apparatus is in a mode where the clock frequency is higher, thereby minimizing disruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If connection destination AP switching is performed based on congestion degree and radio wave conditions, then data exchange efficiency between APs and STA is improved, but operational disruptions occur during critical operations like printing or configuration settings

Engineering Contradiction:
Improvedata exchange efficiencyVSAvoidoperational stability during critical tasks
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies dynamics by making the AP switching decision adaptive to the operational state of the electronic apparatus. The system dynamically adjusts its behavior based on whether the apparatus is in a power saving mode (lower clock frequency) or normal mode (higher clock frequency), allowing flexible response to changing conditions without causing disruptions during critical operations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of processor clock frequency as a control condition for AP switching. By monitoring whether the processor is operating at a lower frequency (power saving mode) or higher frequency (normal mode), the system uses this parameter change to determine when AP switching is safe to perform, thereby avoiding disruptions during critical operations.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If AP switching processing is performed continuously to optimize connection, then connection destination changes appropriately, but power consumption increases when processor operates at high clock frequency

Engineering Contradiction:
Improveconnection optimization capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by enabling AP switching processing only during specific periods when the processor operates at higher clock frequency (normal mode), while disabling it during power saving mode when the processor runs at lower frequency. This periodic activation pattern reduces overall power consumption while maintaining connection optimization capability when needed.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system uses clock frequency as a control parameter to gate AP switching functionality. When the processor clock frequency is lowered for power saving, the AP switching processing is automatically disabled. When the clock frequency is raised for normal operation, AP switching becomes available. This parameter-based control optimizes the balance between adaptability and power consumption.

Inventive Principle:
Principle #35Parameter changes

3Speed

If AP change request is always processed to respond to network conditions, then connection destination switches timely, but processing load increases during power saving mode

Engineering Contradiction:
Improveresponse speed to network changesVSAvoidprocessing load
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the AP switching response adaptive to the processor's operational state. The system dynamically adjusts its responsiveness based on whether it is in power saving mode (lower clock frequency, reduced processing capability) or normal mode (higher clock frequency, full processing capability), allowing timely responses when possible while reducing processing load when necessary.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses clock frequency as a threshold parameter to control processing behavior. When the processor operates at lower frequency during power saving mode, the system changes its behavior by disabling AP switching processing. When the processor operates at higher frequency during normal mode, full processing capability is restored. This parameter-based control optimizes the balance between response speed and processing load.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250254612A1Electronic apparatus, electronic apparatus control method, and storage medium storing one or more programs therein
Publication Date: 2025.08.07 CANON KK
  • US20250254612A1 patent drawing
  • US20250254612A1 patent drawing
  • US20250254612A1 patent drawing

AI summary

An electronic apparatus includes receiving, from a currently connected access point, a change request to change an access point that is a connection destination, performing control so that processing for changing the connection destination based on the change request is not performed if the electronic apparatus is in, from among a first mode and a second mode, the first mode, where a clock frequency of the at least one processor is lower in the second mode than in the first mode, and performing control so that the processing for changing the connection destination based on the change request is performed if the electronic apparatus is in the second mode