Electronic Component Layer Alignment Tolerance
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Solution Overview
Problem
High-speed production methods for electronic components often result in deviations from ideal positioning of electrical functional layers, leading to defects and reduced functionality due to the increased likelihood of misalignment during continuous processing.
Innovation Solution
A method that allows for the formation and alignment of additional electrical functional layers with minimal effort, tolerating deviations from ideal positioning by ensuring the first layer protrudes beyond the substrate's surface area in both directions, thereby accommodating positive and negative deviations, and using continuous processes like printing, laser structuring, or photolithographic methods to maintain high process speeds and reduce defective components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high process speeds are used in continuous production, then productivity increases, but positioning precision of electrical functional layers deteriorates
Solution Approach 1:
The patent applies preliminary action by extending the first electrical functional layer beyond the ideal boundary before subsequent layers are applied. This pre-positioning creates a tolerance zone that accommodates positioning deviations occurring during high-speed continuous processing, allowing later layers to be aligned relative to the extended first layer rather than requiring perfect initial positioning.
Solution Approach 2:
The patent changes the geometric parameter of the first electrical functional layer by extending its length beyond the ideal boundary defined by the surface area F. This parameter modification creates a buffer zone that absorbs positioning errors, enabling high-speed processing while maintaining functional integrity through relative positioning of subsequent layers.
2Productivity
If high process speeds are used in continuous production, then productivity increases, but component functionality deteriorates due to misalignment
Solution Approach 1:
The extended first electrical functional layer serves as a preliminary reference structure that maintains functionality even when subsequent layers are misaligned during high-speed processing. By creating this extended reference zone before other layers are applied, the patent ensures that functional connections can still be established despite positioning deviations.
Solution Approach 2:
The extension of the first electrical functional layer beyond the ideal boundary creates a cushion or buffer zone that protects against positioning errors. This beforehand cushioning absorbs the impact of misalignment that occurs during high-speed continuous processing, preventing functional failures that would otherwise result from layer misregistration.
3Manufacturing precision
If precise positioning of electrical functional layers is maintained, then component functionality is ensured, but process speed must be reduced
Solution Approach 1:
Instead of requiring precise positioning during high-speed processing, the patent uses preliminary action by extending the first layer to create a tolerance buffer. This allows subsequent layers to be positioned relatively rather than absolutely, maintaining functionality without sacrificing process speed.
Data Source
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AI summary
The invention relates to a method for producing an electronic component on the surface of a substrate, said electronic component comprising, perpendicularly to the surface of the substrate, at least two electrical functional layers arranged in such a way that one lies over the other and they overlap at least in a surface region F. The at least two electrical functional layers are structured on the substrate directly or indirectly during a continuous process. A first electrical functional layer of the at least two electrical functional layers is structured in such a way that a first length/width dimension of the first electrical functional layer is, parallel to the surface of the substrate and in a relative displacement direction thereof, at least 5 µm longer/wider, preferably 1 mm longer/wider, than a length/width dimension of the surface region F in the relative displacement direction and parallel to the surface of the substrate.