Electronic Component Thinning via Segmented Sealing Layers

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Solution Overview

Problem

Existing electronic components are limited in downsizing due to the inability to effectively reduce the size of the sealing resin and substrate, leading to inefficiencies in mounting chip components on substrates with larger electrode pitches.

Innovation Solution

The electronic component design includes a substrate with a chip having a mounting and non-mounting surface, where the chip is sealed with a thinning sealing insulation layer and covered with a cover layer, allowing for reduced thickness and protection of the non-mounting surface, enabling downsizing while preventing chip damage during grinding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the chip is sealed with a conventional sealing resin structure, then the chip is protected, but the overall size of the electronic component cannot be reduced

Engineering Contradiction:

Improvesize of electronic componentVSAvoidchip protection

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

The sealing structure is divided into multiple functional layers: a sealing insulation layer that provides electrical insulation and basic sealing, and a cover layer that provides mechanical protection. This segmentation allows each layer to be optimized for its specific function while reducing the overall thickness compared to a single bulky sealing resin structure.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent employs thin film structures for the sealing insulation layer and cover layer, replacing the conventional thick sealing resin. These thin layers provide the necessary protection while significantly reducing the vertical thickness of the electronic component, enabling downsizing.

Inventive Principle:

Principle #30Flexible shells and thin films

2Volume of moving object

If the sealing structure is thinned to reduce component size, then downsizing is achieved, but the chip becomes vulnerable to damage during grinding

Engineering Contradiction:

Improvethickness of sealing structureVSAvoidchip durability during manufacturing

Core Design Contradiction:

Volume of moving objectVSStrength

Solution Approach 1:

The chip is sealed with the sealing insulation layer and cover layer formed in advance before the dicing and grinding processes. This preliminary sealing action protects the chip from mechanical damage during subsequent manufacturing steps, allowing the sealing structure to be thinned without compromising chip durability during processing.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The sealing insulation layer and cover layer are formed to provide protective cushioning to the chip before it undergoes the damaging grinding process. This beforehand protection ensures the chip survives the manufacturing process even with a thinned sealing structure.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Length of stationary object

If the sealing resin is reduced in size, then component downsizing is achieved, but the non-mounting surface of the chip becomes exposed and vulnerable

Engineering Contradiction:

Improvethickness of sealing resinVSAvoidexposure of non-mounting surface

Core Design Contradiction:

Length of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The cover layer serves multiple functions: it protects the exposed non-mounting surface of the chip, provides additional mechanical strength, and maintains the thinned profile of the sealing structure. This multi-functional layer addresses the vulnerability of the exposed surface while preserving the downsizing benefits.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the downsizing of electronic components by thinning the sealing structure and protecting the chip, facilitating more efficient use of space on substrates with larger electrode pitches.

Implementation Method 1

a sealing insulation layer that seals the chip so as to expose the non-mounting surface above the first major surface of the substrate

Methodology Applied

Scientific EffectSealing: Physical Containment

Implementation Method 2

a cover layer which covers the non-mounting surface of the chip

Methodology Applied

Scientific EffectProtective coating: Coatings

Implementation Method 3

a step of grinding the sealing structure together with the chip from the non-mounting surface-side of the chip, thereby thinning the sealing structure

Methodology Applied

Scientific EffectGrinding: Abrasion

Data Source

PatentUS10879146B2Electronic component and manufacturing method thereof

Publication Date: 2020.12.29 ROHM CO LTD

AI summary

An electronic component includes a substrate which has a first major surface on one side and a second major surface on the other side, a chip which has a mounting surface on one side and a non-mounting surface on the other side and is disposed on the first major surface of the substrate in a posture that the mounting surface faces the first major surface of the substrate, a sealing insulation layer which seals the chip so as to expose the non-mounting surface above the first major surface of the substrate, and a cover layer which covers the non-mounting surface of the chip.