Electronic Design Data Rate Determination via Graph Decomposition
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Solution Overview
Problem
Existing high-level electronic design systems struggle to accurately determine data rates and types, especially in designs with feedback loops or interdependent rate and type parameters, often failing to propagate compatible values and failing to identify incompatible specifications.
Innovation Solution
A processor-based method that generates a directed graph of electronic designs, decomposing it into acyclic and strongly connected subgraphs to determine data rates and types through iterative graph searches, propagating data rate and type information simultaneously and identifying inconsistencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing propagation methods are used to determine data rates and types, then simple linear designs can be processed, but feedback loops and interdependent parameters cause the method to fail
Solution Approach 1:
The directed graph representing the electronic design is decomposed into multiple strongly connected components (SCCs). Each SCC is processed independently through iterative graph searches, allowing the system to handle complex interdependencies within each component while maintaining overall system reliability. This segmentation enables the method to successfully process designs with feedback loops that would otherwise cause failure.
2Productivity
If automated inference tools are used to propagate data rates and types, then designer productivity increases, but the tools fail to identify incompatible specifications in complex designs
Solution Approach 1:
The system performs iterative graph searches on strongly connected components, using feedback from each iteration to refine data rate and type assignments. The iterative process continues until convergence or detection of incompatible specifications, ensuring both high productivity through automation and high precision in identifying specification conflicts that single-pass methods would miss.
Solution Approach 2:
The system dynamically adapts its processing approach based on the structure of the design graph. By identifying strongly connected components and applying iterative searches only where needed, the system optimizes the balance between automated inference speed and detection accuracy, maintaining high productivity while precisely identifying incompatible specifications in complex interdependent regions.
3Reliability
If manual specification of data rates and types is performed for all blocks, then compatibility is ensured, but designer effort and time consumption increase significantly
Solution Approach 1:
The system automatically performs preliminary data rate and type propagation through the design graph before final verification. By pre-computing compatible values for blocks with independent parameters and only requiring manual or iterative resolution for strongly connected components, the system significantly reduces designer time consumption while maintaining compatibility reliability.
Data Source
AI summary
Determining data rates and data types in a an electronic design. In one embodiment, an electronic design is created in a memory arrangement in response to user input. The electronic design includes a plurality of functional blocks and a plurality of nets connecting the functional blocks. In response to user input, an output data rate and an output data type of data output from at least one of the functional blocks are determined. The input data rate and input data type to each functional block coupled via a net to the at least one functional block are equal to the output data rate and output data type, respectively, from the at least one functional block. For each functional block, an output data rate and output data type are determined as a function of the input data rate and the input data type of the functional block.