Electronic Device Calibration Using Re-synchronization Point Data
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Solution Overview
Problem
Existing calibration methods for electronic devices, such as those using the C-PHY protocol, face challenges in accurately recovering a clock signal during additional calibration periods, particularly when jitter characteristics are introduced, leading to incorrect clock generation and data reception issues.
Innovation Solution
The proposed solution involves an electronic device with a signal processor, pattern generator, re-synchronization point generator, and calibration performer. This device performs preamble calibration followed by alternative calibration using random patterns, and includes a re-synchronization process to recover a noisy clock signal by comparing reception data with pattern data and adjusting delay steps as needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If alternative calibration using random patterns is performed, then calibration accuracy is improved, but clock signal stability deteriorates due to introduced jitter
Solution Approach 1:
The patent applies preliminary action by performing preamble calibration before alternative calibration. The preamble calibration establishes a stable baseline using simple repeating patterns ('3' or '1') that minimize jitter. This preliminary calibration ensures that the delay circuit is pre-adjusted to optimal settings before the more complex alternative calibration with random patterns begins, thereby maintaining clock signal stability while still achieving accurate calibration.
Solution Approach 2:
The patent maintains continuity of useful action by seamlessly transitioning from preamble calibration to alternative calibration without interrupting the calibration process. The delay circuit settings established during preamble calibration are continuously refined during alternative calibration, ensuring that the clock signal remains stable throughout the entire calibration sequence. This continuous adjustment process prevents clock signal degradation while achieving precise calibration.
2Stability of the object's composition
If simple preamble calibration pattern is used, then clock signal stability is maintained, but calibration precision is insufficient for complex communication requirements
Solution Approach 1:
The patent applies segmentation by dividing the calibration process into two distinct segments: preamble calibration and alternative calibration. The preamble calibration segment uses simple repeating patterns to establish basic timing relationships and stabilize the clock signal. The alternative calibration segment then uses complex random patterns (PRBS9) to refine the calibration precision. This segmentation allows each segment to optimize for its specific purpose while collectively achieving both stability and precision.
Solution Approach 2:
The patent merges the results of preamble calibration and alternative calibration to achieve final calibration accuracy. The delay circuit settings from preamble calibration are combined with the refined adjustments from alternative calibration. This merging of calibration results ensures that the final calibration configuration benefits from both the stability provided by simple patterns and the precision provided by complex random patterns.
3Measurement precision
If additional calibration with random patterns is performed after preamble calibration, then calibration accuracy is improved, but data reception reliability deteriorates due to noisy clock signals
Solution Approach 1:
The patent applies feedback by continuously monitoring the calibration process during alternative calibration. The system observes the quality of the recovered clock signal and adjusts the delay circuit settings accordingly. If jitter or noise is detected in the clock signal during alternative calibration, the feedback mechanism allows the system to adjust delay steps to maintain data reception reliability while still achieving calibration accuracy through the random pattern calibration.
Data Source
AI summary
An electronic device includes a first electronic device including a signal generator configured to generate signals for a first calibration using a first pattern, and a second calibration using a random pattern; and a second electronic device. The second electronic device includes a signal processor configured to process reception data transmitted from the first electronic device; a pattern generator configured to generate pattern data for the second calibration; a re-synchronization point generator configured to generate re-synchronization point data to recover a noisy clock signal during the second calibration; and a calibration performer configured to perform the second calibration using the reception data, the pattern data, and the re-synchronization point data.