Electronic Fuse Doping Layout for Close-Packed Transistor Isolation
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Solution Overview
Problem
As semiconductor devices shrink, the proximity of electronic fuses to nearby components leads to dopant diffusion, causing contamination and impairing their function, necessitating a new design to prevent dopant contamination and enable smaller device sizes.
Innovation Solution
A semiconductor device with specific doping regions of the same conductive type under the electronic fuse and switching transistor, separated by regions of different conductive types, and a method involving multiple ion implantation processes to form these regions, ensuring minimal dopant contamination and enabling smaller device dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the electronic fuse is packed close to the nearby component to reduce device size, then the device dimension is reduced, but dopant diffusion causes contamination and impairs the function of the electronic fuse and nearby component
Solution Approach 1:
The patent introduces a first doping region with a first conductive type as an intermediary between the second doping region (underneath the nearby component) and third doping regions (with different conductive types). This intermediary doping region acts as a barrier to prevent dopant diffusion and contamination between adjacent regions, enabling closer packing of the electronic fuse and nearby component while maintaining their functional integrity
Solution Approach 2:
The patent applies local quality by creating distinct doping regions with different conductive types in specific locations. The first doping region with the first conductive type is locally positioned between the second and third doping regions to provide localized protection against dopant diffusion, allowing different parts of the substrate to have different doping characteristics tailored to their specific functional requirements
2Reliability
If multiple ion implantation processes are performed to create separated doping regions, then dopant contamination is prevented, but the manufacturing process complexity increases
Solution Approach 1:
The patent merges the formation of the first and second doping regions into a single first ion implantation process, where both regions are created simultaneously with the same dopant type. This combining of operations reduces the total number of separate implantation steps required, simplifying the manufacturing process while still achieving the desired doping pattern that prevents contamination
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents dopant contamination while allowing for reduced distances between electronic fuses and transistors, maintaining device performance and facilitating easier current flow, thus enhancing manufacturing efficiency and device size reduction.
Implementation Method 1
A first ion implantation process is performed to form a first implantation region in the substrate. A second ion implantation process is performed adjacent to the first spacers to transform first portions of the first implantation region into second implantation regions in the substrate. A third ion implantation process is performed adjacent to the second spacers to transform first portions of the second implantation regions into third implantation regions in the substrate.
Implementation Method 2
the types of dopants implanted under the electronic fuse and the nearby component are different, the dopants may diffuse and cause contamination
Data Source
AI summary
The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, an electronic fuse, and a switching transistor. The electronic fuse is on the substrate. The switching transistor is on the substrate and next to the electronic fuse, in which a first doping region of the substrate underneath the electronic fuse has a first conductive type, a second doping region of the substrate underneath the switching transistor has a second conductive type, the first conductive type and the second conductive type are the same, the first doping region of the substrate is disposed between third doping regions of the substrate, and third conductive types of the third doping regions are different from the first conductive type.