Electronic Package Conductive Layer Layout for Lower DC Resistance

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Solution Overview

Problem

Conventional semiconductor packages face issues with increased DC resistance and power outages due to long power transmission paths, leading to impedance problems in electronic components positioned above the routing structure, especially those farther from the center of the first semiconductor chip.

Innovation Solution

The design includes an electronic package with a first electronic component having an active surface, a non-active surface, and side surfaces, featuring electrode pads on the active surface connected by wires inside the component, with conductive layers formed on the non-active and side surfaces, acting as additional power transmission structures within an encapsulant, reducing DC resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If power is transmitted from the circuit board through the circuit layer and conductive pillars to electronic components above the routing structure, then power can be supplied to distant components, but the DC resistance increases and power supply reliability deteriorates due to long transmission paths

Engineering Contradiction:
Improvepower supply reliabilityVSAvoidDC resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent divides the power transmission path into multiple segments by introducing intermediate power supply contacts on the first semiconductor chip. Instead of a single long path from the circuit board to distant components, the power path is segmented into shorter sections: circuit board to power supply contact, then to routing structure, then to electronic components. This segmentation reduces the overall DC resistance and improves power supply reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces power supply contacts as intermediary elements on the first semiconductor chip. These contacts act as mediators that receive power from the circuit board through conductive pillars and redistribute it to the routing structure and electronic components. This intermediary approach creates additional power transmission paths and reduces the length of individual paths, thereby reducing DC resistance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Length of moving object

If electronic components are positioned above the routing structure closer to the center of the first semiconductor chip, then power transmission path length decreases, but device complexity and routing constraints increase

Engineering Contradiction:
Improvepower transmission path lengthVSAvoidrouting structure complexity
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The patent utilizes the vertical dimension by positioning power supply contacts on the first semiconductor chip and using conductive pillars to connect to the circuit board below. This three-dimensional power transmission approach allows power to be supplied to electronic components above the routing structure without requiring excessively long lateral paths, thus reducing path length while managing routing complexity through vertical interconnections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces DC resistance by creating additional current paths through electrode pads, wires, and conductive layers, improving power supply efficiency and minimizing impedance issues compared to conventional designs.

Implementation Method 1

at least one wire electrically connected with the electrode pad is provided inside the first electronic component; and at least one conductive layer formed on the first electronic component and embedded in the encapsulant and electrically connected with the wire

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20240379477A1Electronic package and manufacturing method thereof
Publication Date: 2024.11.14 SILICONWARE PRECISION IND CO LTD
  • US20240379477A1 patent drawing
  • US20240379477A1 patent drawing
  • US20240379477A1 patent drawing

AI summary

An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.