Electronic Package Layout With Magnetic Core for Higher Inductance
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Solution Overview
Problem
Conventional semiconductor packages face challenges in integrating passive components like inductors due to space constraints, leading to reduced routability and increased package size, which hinders the miniaturization and high integration of semiconductor devices.
Innovation Solution
The proposed electronic package includes a carrier with a magnetically permeable member between the carrier and an electronic component, surrounded by a conductor structure with conductive bumps, enhancing magnetic flux and inductance without increasing package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive components are placed at the corners of the substrate or on additional substrate layout area, then the electrical connections between semiconductor chip and bonding pads are prevented from being hindered, but the routability of wires on the substrate is reduced and the package size increases
Solution Approach 1:
The patent transitions from planar placement of passive components to three-dimensional integration by placing passive components on a separate carrier substrate that is vertically stacked with the semiconductor chip. This vertical stacking approach eliminates the need to consume additional lateral area on the package substrate, thereby resolving the contradiction between ensuring reliable electrical connections and minimizing package size.
Solution Approach 2:
The patent divides the package structure into separate functional modules: the semiconductor chip mounted on the package substrate, and passive components mounted on a separate carrier substrate. This segmentation allows each component to be optimized independently and connected through controlled impedance traces, ensuring reliable electrical connections without compromising routability or increasing package area.
2Adaptability or versatility
If chip-type inductive components are used, then passive components can be integrated between semiconductor chip and bonding pads, but the inductive component occupies significant layout area and has large volume
Solution Approach 1:
The patent replaces traditional chip-type inductive components with planar spiral inductors fabricated as thin-film conductive traces on the carrier substrate. This substitution eliminates the need for bulky three-dimensional chip structures, achieving the same inductive function with dramatically reduced volume and area occupation while maintaining integration capability.
3Device complexity
If coil-type inductors are provided only on the package substrate, then the structure is simplified, but the simulated inductance value is limited and too small to meet demand
Solution Approach 1:
The patent employs a composite structure where planar spiral inductors are fabricated using conductive materials (such as copper or aluminum traces) combined with magnetic core materials or magnetic shielding layers on the carrier substrate. This composite approach significantly enhances the inductance value compared to simple planar coils, meeting performance requirements while maintaining structural simplicity and enabling high integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design increases the inductance value of the package while minimizing its size, allowing for more compact and high-integration semiconductor devices by achieving the same inductance with fewer coil turns.
Implementation Method 1
at least one magnetically permeable member provided between the carrier and the electronic component
Implementation Method 2
an electronic package including a ferromagnetic material
Data Source
AI summary
An electronic package in which at least one magnetically permeable member is disposed between a carrier and an electronic component, where the electronic component has a first conductive layer, and the carrier has a second conductive layer, such that the magnetically permeable element is located between the first conductive layer and the second conductive layer. Moreover, a plurality of conductive bumps that electrically connect the first conductive layer and the second conductive layer are arranged between the electronic component and the carrier to surround the magnetically permeable member for generating magnetic flux.


