Electronic Package Layout With Direct Chip-to-Chip Signal Paths
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Solution Overview
Problem
Conventional semiconductor packaging structures face limitations in signal transmission speed due to longer paths and performance bottlenecks from bridge chips, which cannot meet the high-speed computing demands of emerging technologies.
Innovation Solution
The proposed electronic package structure includes a first electronic component in a first encapsulating layer, a second electronic component in a second encapsulating layer, and an active electronic component in a third encapsulating layer, where the active surface of the third component is directly electrically connected to the first and second active surfaces, bypassing traditional bridge chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If bridge chip is used to connect functional chip and high bandwidth memory, then signal transmission path is established, but signal transmission speed is limited by longer path and bridge chip performance
Solution Approach 1:
The patent removes the bridge chip from the signal transmission path, extracting this intermediate component that was limiting signal speed. The functional chip and high bandwidth memory are directly connected through the redistribution layer, eliminating the performance bottleneck caused by the bridge chip while maintaining the necessary electrical connections.
Solution Approach 2:
The patent transitions from a vertical stacking architecture (functional chip → bridge chip → memory) to a lateral connection architecture where the functional chip and memory are positioned side by side and connected through the redistribution layer. This dimensional change shortens the signal path and eliminates the need for the bridge chip intermediate layer.
2Speed
If multiple chips and redistribution layers are arranged in conventional fan-out structure, then high heat dissipation and large fan-out size are achieved, but signal transmission path becomes longer
Solution Approach 1:
Instead of routing signals vertically through multiple layers via a bridge chip, the patent inverts the connection approach by establishing direct lateral connections between the functional chip and memory through the redistribution layer. This reverses the traditional signal path topology and significantly reduces transmission distance.
3Ease of operation
If bridge chip is positioned in the signal transmission path, then signal routing is achieved, but transmission speed is limited by bridge chip performance
Solution Approach 1:
The patent extracts the bridge chip from the signal transmission path, removing the component that was limiting signal speed. The routing function previously performed by the bridge chip is now achieved through the redistribution layer's trace patterns, which provide direct electrical connections without the performance constraints of an intermediate chip.
Data Source
AI summary
An electronic package includes a first electronic component having a first active surface disposed in a first encapsulating layer; at least one second electronic component having a second active surface disposed in a second encapsulating layer; and an active electronic component having a third active surface disposed in a third encapsulating layer, the third active surface is electrically connected to and facing to the first active surface and the second active surface respectively, and the third active surface is directly electrically connected to the first active surface. By the implementation of the present invention, the signal transmission speed in the package can be accelerated by directly electrically connecting the active electronic component to the first electronic component disposed in the third and the first encapsulating layers respectively, and the work processing speed can be accelerated by assistant provided by the first electronic component.