Electronic Package Frame Structure for Thermal Warpage Control
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Solution Overview
Problem
Conventional semiconductor packages face warpage issues due to thermal expansion mismatches, which occupy valuable space and hinder miniaturization and cost-effectiveness.
Innovation Solution
A semiconductor package design featuring a frame body embedded in the packaging layer that disperses thermal stress, allowing other electronic components to be arranged around the chip without increasing the package size, using a wiring structure with a frame body that neither contacts nor covers the chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a dummy block is arranged around the semiconductor chip to reduce warpage, then warpage is reduced, but the surface area occupied increases, leaving no space for other electronic components
Solution Approach 1:
The frame body is designed with a three-dimensional structure that includes vertical height, allowing it to provide warpage compensation in the vertical dimension rather than occupying horizontal surface area. This dimensional transition enables the frame body to fulfill the warpage reduction function while preserving the limited surface space on the packaging substrate for other electronic components.
Solution Approach 2:
The frame body is designed as a thin-walled structure with wall thickness between 0.01mm to 0.05mm, providing flexibility and elasticity to absorb thermal stress. This thin-film approach allows the frame body to effectively counteract warpage forces while occupying minimal space, solving the contradiction between warpage reduction and surface area occupation.
2Ease of manufacture
If the packaging substrate size is increased to arrange required wiring layers, then wiring space is sufficient, but manufacturing costs increase and miniaturization demand is not met
Solution Approach 1:
By transitioning the warpage compensation mechanism from a two-dimensional dummy block to a three-dimensional frame body structure, the invention enables effective warpage control within a compact footprint. This allows the packaging substrate to maintain a small size while still providing adequate space for wiring layers and other electronic components.
3Strength
If the frame body contacts the wiring structure or covers the electronic component, then structural support is enhanced, but the electronic component cannot be exposed or other components cannot be arranged
Solution Approach 1:
The frame body is designed with localized structural features including opening areas and varying wall thicknesses (0.01mm to 0.05mm) that provide structural support precisely where needed while maintaining openness in other areas. This localized quality approach allows the frame body to offer structural reinforcement without covering electronic components or preventing the arrangement of other components on the packaging substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design prevents warpage during thermal cycles, enabling miniaturization and reducing manufacturing costs by allowing required wirings on the package surface without enlarging the package size.
Implementation Method 1
a mismatch between the coefficients of thermal expansion (CTE) of the semiconductor chip 11 and the packaging layer would easily result in non-uniform thermal stress, causing the packaging layer 14 to warp during thermal cycles
Data Source
AI summary
An electronic package is provided in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure is embedded in the packaging layer. Therefore, thermal stress is dispersed through the frame body to avoid warpage of the electronic package, so as to facilitate the arrangement of other electronic components around the electronic component.