Electronic Panel Conductive Spacer Layout for Compact Electrical Connectivity
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Solution Overview
Problem
The challenge in the semiconductor industry is to efficiently utilize substrate space and reduce the bonding process for electronic devices, particularly in display devices, antenna devices, and sensing devices, while ensuring effective electrical connectivity and structural integrity.
Innovation Solution
The electronic device incorporates a panel structure with a first substrate, a second substrate, a medium layer, first electrodes, connecting lines, and conductive spacers, where the spacers are separated by specific spaces to optimize space utilization and electrical connections, using conductive particles in the sealant to enhance conductivity and structural support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive spacers are used to connect electrodes and connecting lines, then electrical connectivity is improved, but device complexity increases
Solution Approach 1:
The conductive spacer acts as an intermediary component that bridges the electrode and connecting line, enabling electrical connection while maintaining spatial separation. The spacer is positioned in the medium layer to facilitate current flow between the electrode (on the first substrate) and the connecting line (on the second substrate), thus improving electrical connectivity without requiring direct contact between the electrode and connecting line.
Solution Approach 2:
The conductive spacer utilizes the third dimension (thickness direction) to establish electrical connection. Instead of expanding the connection area in the plane direction, the spacer extends vertically through the medium layer, connecting the electrode and connecting line along the thickness direction. This dimensional approach reduces in-plane space requirements while maintaining effective electrical connectivity.
2Area of stationary object
If substrate space is reduced to improve device compactness, then device size is decreased, but manufacturing precision requirements increase
Solution Approach 1:
The patent specifies a controlled thickness range for the conductive spacer (3 μm to 50 μm) to optimize its performance. By controlling the spacer's thickness parameter within this range, the design achieves effective electrical connection while maintaining adequate separation from adjacent structures. This parameter control enables compact substrate space utilization without excessive precision requirements, as the thickness range provides manufacturing tolerance.
Solution Approach 2:
The conductive spacer is positioned at specific locations where electrical connection is needed, rather than uniformly distributing conductive elements across the substrate. The spacer's conductive property is localized to the connection point between electrode and connecting line, while maintaining insulation elsewhere. This localized approach optimizes substrate space by concentrating conductive functionality only where required.
3Area of stationary object
If conductive spacers are positioned close to adjacent electrodes and connecting lines, then substrate space utilization is improved, but electrical interference increases
Solution Approach 1:
The medium layer serves as an intermediary insulating layer between the conductive spacer and adjacent electrodes or connecting lines. This medium layer prevents direct electrical contact between the spacer and neighboring conductive elements, thereby eliminating electrical interference while allowing the spacer to be positioned in close proximity to maximize substrate space utilization.
Solution Approach 2:
The patent defines a specific thickness range (3 μm to 50 μm) for the conductive spacer that balances two competing requirements: being thin enough to maximize substrate space utilization, and being thick enough to maintain adequate electrical isolation from adjacent structures. This parameter optimization enables close positioning without excessive electrical interference.
Data Source
AI summary
An electronic device including a panel. The panel includes a first substrate, a second substrate opposite to the first substrate, a medium layer between the first substrate and the second substrate, first electrodes between the first substrate and the medium layer, connecting lines between the second substrate and the first electrodes, and a conductive spacer. The first electrodes include a connecting first electrode and an adjacent first electrode. The connecting lines include a first connecting line and a second connecting line. The conductive spacer is electrically connected to the connecting first electrode and the first connecting line. The second connecting line is adjacent to the first connecting line. The conductive spacer is separated from the second connecting line by a third space S3. The third space S3 is greater than or equal to 3 μm and less than or equal to 50 μm.