Electronic Substrate With Face-Separated Passive And Active Elements
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Solution Overview
Problem
Conventional techniques for reducing semiconductor package size and increasing density lead to electrical coupling between passive and active elements, causing deterioration in active element characteristics and overall semiconductor device performance.
Innovation Solution
An electronic substrate design with a passive element on one face and an active element on the opposite face, separated by a substrate, along with a penetrative conductive portion and interconnection patterns, to minimize electrical coupling and enhance connectivity while maintaining a thin profile.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If passive elements are arranged near active elements to reduce substrate size and increase density, then the substrate size is reduced and integration density is improved, but electrical coupling occurs between passive and active elements causing deterioration in active element characteristics
Solution Approach 1:
The substrate is divided into two distinct faces: the first face for active elements and the second face for passive elements. This spatial segmentation physically separates the two types of elements, preventing electrical coupling while maintaining high integration density within the compact substrate volume.
Solution Approach 2:
The invention transitions from planar arrangement to three-dimensional utilization by placing passive elements on the opposite face of the substrate relative to active elements. This vertical stacking approach in the thickness direction enables compact integration without lateral expansion, while the substrate thickness is controlled to minimize electromagnetic coupling.
2Object-affected harmful factors
If the substrate thickness is increased to reduce electrical coupling between faces, then electromagnetic interference is reduced, but the substrate size and device complexity increase
Solution Approach 1:
The substrate thickness is optimized within a specific range (0.5mm to 2.0mm) to achieve the right balance: thick enough to reduce electrical coupling and electromagnetic interference between faces, but thin enough to maintain compact device size and enable effective heat dissipation. This parameter optimization resolves the contradiction between isolation and compactness.
Data Source
AI summary
An electronic substrate includes: an electronic element provided on a first face of a semiconductor substrate having a through hole; a passive element provided on a second face of the semiconductor substrate; a first part of an interconnection pattern provided on the second face of the semiconductor substrate; an insulating layer provided on the second face of the semiconductor substrate; and a second part of the interconnection pattern provided on the insulating layer.